stm32f3: include CAN

include/libopencm3/stm32/f3/memorymap.h

@@ -59,7 +59,7 @@
 #define I2C2_BASE			(PERIPH_BASE_APB1 + 0x5800)
 #define USB_DEV_FS_BASE			(PERIPH_BASE_APB1 + 0x5C00)
 #define USB_PMA_BASE			(PERIPH_BASE_APB1 + 0x6000)
-#define BX_CAN_BASE			(PERIPH_BASE_APB1 + 0x6400)
+#define BX_CAN1_BASE			(PERIPH_BASE_APB1 + 0x6400)
 /* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved */
 /* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */
 #define POWER_CONTROL_BASE		(PERIPH_BASE_APB1 + 0x7000)

include/libopencm3/stm32/f3/rcc.h

@@ -218,7 +218,7 @@
 #define RCC_APB1RSTR_DAC1RST			(1 << 29)
 #define RCC_APB1RSTR_PWRRST			(1 << 28)
 #define RCC_APB1RSTR_DAC2RST			(1 << 26)
-#define RCC_APB1RSTR_CANRST			(1 << 25)
+#define RCC_APB1RSTR_CAN1RST			(1 << 25)
 #define RCC_APB1RSTR_USBRST			(1 << 23)
 #define RCC_APB1RSTR_I2C2RST			(1 << 22)
 #define RCC_APB1RSTR_I2C1RST			(1 << 21)

lib/stm32/can.c

@@ -41,6 +41,8 @@ LGPL License Terms @ref lgpl_license
 #	include <libopencm3/stm32/f1/rcc.h>
 #elif defined(STM32F2)
 #	include <libopencm3/stm32/f2/rcc.h>
+#elif defined(STM32F3)
+#	include <libopencm3/stm32/f3/rcc.h>
 #elif defined(STM32F4)
 #	include <libopencm3/stm32/f4/rcc.h>
 #else
@@ -75,8 +77,10 @@ void can_reset(uint32_t canport)
 		rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN1RST);
 		rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN1RST);
 	} else {
+#if defined(BX_CAN2_BASE)
 		rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN2RST);
 		rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN2RST);
+#endif
 	}
 }
 

lib/stm32/f3/Makefile

@@ -36,7 +36,7 @@ TGT_CFLAGS      += $(DEBUG_FLAGS)
 
 ARFLAGS		= rcs
 
-OBJS		= rcc.o adc.o i2c.o usart.o dma.o flash.o desig.o
+OBJS		= rcc.o adc.o can.o i2c.o usart.o dma.o flash.o desig.o
 
 OBJS            += gpio_common_all.o gpio_common_f0234.o \
 		   dac_common_all.o crc_common_all.o \