From d8aa2f17b02d1ae8e6c3cb9f1f64f1d8aaea4f4b Mon Sep 17 00:00:00 2001 From: "me@me.net" Date: Wed, 27 Apr 2022 14:37:27 +0200 Subject: [PATCH] stm32: timer: Add API to set external clock mode 2 --- .../libopencm3/stm32/common/timer_common_all.h | 8 ++++++++ lib/stm32/common/timer_common_all.c | 17 +++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/include/libopencm3/stm32/common/timer_common_all.h b/include/libopencm3/stm32/common/timer_common_all.h index 08939d90..e5ff582d 100644 --- a/include/libopencm3/stm32/common/timer_common_all.h +++ b/include/libopencm3/stm32/common/timer_common_all.h @@ -1143,6 +1143,12 @@ enum tim_et_pol { TIM_ET_FALLING, }; +/** External clock mode 2 */ +enum tim_ecm2_state { + TIM_ECM2_DISABLED, + TIM_ECM2_ENABLED, +}; + /* --- TIM function prototypes --------------------------------------------- */ BEGIN_DECLS @@ -1233,6 +1239,8 @@ void timer_slave_set_prescaler(uint32_t timer, enum tim_ic_psc psc); void timer_slave_set_polarity(uint32_t timer, enum tim_et_pol pol); void timer_slave_set_mode(uint32_t timer, uint8_t mode); void timer_slave_set_trigger(uint32_t timer, uint8_t trigger); +void timer_slave_set_extclockmode2(uint32_t timer_peripheral, + enum tim_ecm2_state state); END_DECLS diff --git a/lib/stm32/common/timer_common_all.c b/lib/stm32/common/timer_common_all.c index cec245a4..220c13fb 100644 --- a/lib/stm32/common/timer_common_all.c +++ b/lib/stm32/common/timer_common_all.c @@ -1864,6 +1864,23 @@ void timer_slave_set_trigger(uint32_t timer_peripheral, uint8_t trigger) TIM_SMCR(timer_peripheral) |= trigger; } +/*---------------------------------------------------------------------------*/ +/** @brief Set External Clock Mode 2 + +@param[in] timer_peripheral Unsigned int32. Timer register address base +@param[in] state ::tim_ecm2_state. External Clock Mode 2 state +*/ + +void timer_slave_set_extclockmode2(uint32_t timer_peripheral, + enum tim_ecm2_state state) +{ + if (state) { + TIM_SMCR(timer_peripheral) |= TIM_SMCR_ECE; + } else { + TIM_SMCR(timer_peripheral) &= ~TIM_SMCR_ECE; + } +} + /* TODO Timer DMA burst */ /**@}*/