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stm32: timer common all: Fix documentation

Provide gpio examples for both f1 and "everyone else" gpio blocks

Originally filed at: https://github.com/libopencm3/libopencm3/pull/1243

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
 (Merged old and new into two new examples)
pull/1274/head
Themroc 4 years ago
committed by Karl Palsson
parent
commit
d8d63b3184
  1. 16
      lib/stm32/common/timer_common_all.c

16
lib/stm32/common/timer_common_all.c

@ -44,14 +44,20 @@ Output Compare mode to PWM and enable the output of channel 1. Note that for
the advanced timers the break functionality must be enabled before the signal the advanced timers the break functionality must be enabled before the signal
will appear at the output, even though break is not being used. This is in will appear at the output, even though break is not being used. This is in
addition to the normal output enable. Enable the alternate function clock (APB2 addition to the normal output enable. Enable the alternate function clock (APB2
only) and port A clock. Set ports A8 and A9 (timer 1 channel 1 compare outputs) only) and port A clock. Set port A8 (timer 1 channel 1 compare output) to
to alternate function push-pull outputs where the PWM output will appear. alternate function push-pull output where the PWM output will appear.
@code @code
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_TIM1); rcc_periph_clock_enable(RCC_TIM1);
gpio_set_output_options(GPIOA, GPIO_OTYPE_PP, rcc_periph_clock_enable(RCC_GPIOA);
GPIO_OSPEED_50MHZ, GPIO8 | GPIO9);
// for F1....
gpio_set_output_options(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO8);
// For anyone else
rcc_periph_clock_enable(RCC_AFIO);
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO8);
// End of family specific
rcc_periph_clock_enable(RCC_TIM1); rcc_periph_clock_enable(RCC_TIM1);
timer_set_mode(TIM1, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_CENTER_1, timer_set_mode(TIM1, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_CENTER_1,
TIM_CR1_DIR_UP); TIM_CR1_DIR_UP);

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