Fix STM32H7 FDCAN FIFO acknowledgment process

Fix FDCAN FIFO acknowledge register definition to make it correct for H7
MCUs. Previous definition contained hardcoded offset instead of using
MCU-specific macro.

Fix incorrect decoding of buffer element size. During decoding, value
returned was erratically set to 7 instead of setting 4th LSB. Buffer
element size was then always reported as 15 bytes.

include/libopencm3/stm32/fdcan.h

@@ -78,7 +78,9 @@
  * @param can_base FDCAN block base address @ref fdcan_block
  * @param fifo_id ID of FIFO, 0 or 1
  */
-#define FDCAN_RXFIA(can_base, fifo_id)	MMIO32(can_base + 0x0094 + (FDCAN_RXFI_OFFSET * fifo_id))
+#define FDCAN_RXFIA(can_base, fifo_id)	\
+	MMIO32(can_base + FDCAN_RXFIA_BASE + (FDCAN_RXFI_OFFSET * fifo_id))
+
 #define FDCAN_RXF0A(can_base)			FDCAN_RXFIA(can_base, 0)
 #define FDCAN_RXF1A(can_base)			FDCAN_RXFIA(can_base, 1)
 

lib/stm32/h7/fdcan.c

@@ -79,7 +79,7 @@ unsigned fdcan_get_fifo_element_size(uint32_t canport, unsigned fifo_id)
 	}
 
 	/* Mask is unshifted and at this point, element_size is unshifted too */
-	return 8 + fdcan_dlc_to_length((element_size & FDCAN_RXESC_F0DS_MASK) | 0x7);
+	return 8 + fdcan_dlc_to_length((element_size & FDCAN_RXESC_F0DS_MASK) | 0x8);
 }
 
 /** Returns actual size of transmit entry in transmit queue/FIFO for given CAN port.
@@ -95,7 +95,7 @@ unsigned fdcan_get_txbuf_element_size(uint32_t canport)
 {
 	unsigned element_size;
 	element_size = (FDCAN_TXESC(canport) >> FDCAN_TXESC_TBDS_SHIFT) & FDCAN_TXESC_TBDS_MASK;
-	return 8 + fdcan_dlc_to_length((element_size & FDCAN_TXESC_TBDS_MASK) | 0x7);
+	return 8 + fdcan_dlc_to_length((element_size & FDCAN_TXESC_TBDS_MASK) | 0x8);
 }
 
 /** Initialize allocation of standard filter block in CAN message RAM.
@@ -468,4 +468,4 @@ void fdcan_set_fifo_locked_mode(uint32_t canport, bool locked)
 	}
 }
 
-/**@}*/
+/**@}*/