Frantisek Burian
10 years ago
12 changed files with 402 additions and 2 deletions
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/** @defgroup gpio_defines GPIO Defines
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* |
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* @brief <b>Defined Constants and Types for the STM32F0xx General Purpose I/O</b> |
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* |
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* @ingroup STM32L0xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date 1 July 2012 |
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* |
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* LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#ifndef LIBOPENCM3_GPIO_H |
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#define LIBOPENCM3_GPIO_H |
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#include <libopencm3/stm32/common/gpio_common_f24.h> |
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/*****************************************************************************/ |
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/* Module definitions */ |
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/*****************************************************************************/ |
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/*****************************************************************************/ |
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/* Register definitions */ |
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/*****************************************************************************/ |
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#define GPIO_BRR(port) MMIO32(port + 0x28) |
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#define GPIOA_BRR GPIO_BRR(GPIOA) |
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#define GPIOB_BRR GPIO_BRR(GPIOB) |
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#define GPIOC_BRR GPIO_BRR(GPIOC) |
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#define GPIOD_BRR GPIO_BRR(GPIOD) |
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#define GPIOH_BRR GPIO_BRR(GPIOH) |
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/*****************************************************************************/ |
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/* Register values */ |
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/*****************************************************************************/ |
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/** @defgroup gpio_speed GPIO Output Pin Speed
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@ingroup gpio_defines |
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@{*/ |
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#define GPIO_OSPEED_LOW 0x0 |
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#define GPIO_OSPEED_MED 0x1 |
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#define GPIO_OSPEED_HIGH 0x3 |
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/**@}*/ |
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/*****************************************************************************/ |
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/* API definitions */ |
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/*****************************************************************************/ |
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/*****************************************************************************/ |
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/* API Functions */ |
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/*****************************************************************************/ |
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BEGIN_DECLS |
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END_DECLS |
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#endif |
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@ -0,0 +1,39 @@ |
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{ |
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"irqs": [ |
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"wwdg", |
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"pvd", |
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"rtc", |
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"flash", |
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"rcc", |
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"exti0_1", |
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"exti2_3", |
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"exti4_15", |
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"tsc", |
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"dma1_channel1", |
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"dma1_channel2_3", |
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"dma1_channel4_5", |
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"adc_comp", |
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"lptim1", |
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"reserved1", |
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"tim2", |
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"reserved2", |
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"tim6_dac", |
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"reserved3", |
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"reserved4", |
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"tim21", |
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"reserved5", |
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"tim22", |
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"i2c1", |
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"i2c2", |
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"spi1", |
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"spi2", |
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"usart1", |
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"usart2", |
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"lpuart1", |
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"lcd", |
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"usb" |
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], |
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"partname_humanreadable": "STM32 L0 series", |
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"partname_doxygen": "STM32L0", |
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"includeguard": "LIBOPENCM3_STM32_L0_NVIC_H" |
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} |
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@ -0,0 +1,93 @@ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#ifndef LIBOPENCM3_MEMORYMAP_H |
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#define LIBOPENCM3_MEMORYMAP_H |
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#include <libopencm3/cm3/memorymap.h> |
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/* --- STM32 specific peripheral definitions ------------------------------- */ |
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/* Memory map for all busses */ |
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#define PERIPH_BASE (0x40000000U) |
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#define IOPORT_BASE (0x50000000U) |
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#define INFO_BASE (0x1ff80000U) |
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#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000) |
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#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000) |
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#define PERIPH_BASE_AHB (PERIPH_BASE + 0x20000) |
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/* Register boundary addresses */ |
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/* APB1 */ |
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#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000) |
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#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000) |
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#define LCD_BASE (PERIPH_BASE_APB1 + 0x2400) |
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#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800) |
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#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00) |
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#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000) |
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#define SPI2_BASE (PERIPH_BASE_APB1 + 0x3800) |
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#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400) |
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#define LPUART1_BASE (PERIPH_BASE_APB1 + 0x4800) |
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400) |
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800) |
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00) |
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#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000) |
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#define CRS_BASE (PERIPH_BASE_APB1 + 0x6C00) |
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#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) |
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#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400) |
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#define LPTIM1_BASE (PERIPH_BASE_APB1 + 0x7c00) |
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/* APB2 */ |
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#define SYSCFG_BASE (PERIPH_BASE_APB2 + 0x0000) |
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#define EXTI_BASE (PERIPH_BASE_APB2 + 0x0400) |
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#define TIM21_BASE (PERIPH_BASE_APB2 + 0x0800) |
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#define TIM22_BASE (PERIPH_BASE_APB2 + 0x1400) |
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#define FIREWALL_BASE (PERIPH_BASE_APB2 + 0x1C00) |
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#define ADC1_BASE (PERIPH_BASE_APB2 + 0x2400) |
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#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) |
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#define USART1_BASE (PERIPH_BASE_APB2 + 0x3800) |
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#define DBGMCU_BASE (PERIPH_BASE_APB2 + 0x5800) |
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/* AHB */ |
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#define DMA1_BASE (PERIPH_BASE_AHB + 0x00000) |
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#define RCC_BASE (PERIPH_BASE_AHB + 0x01000) |
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#define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB + 0x02000) |
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#define CRC_BASE (PERIPH_BASE_AHB + 0x03000) |
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#define TSC_BASE (PERIPH_BASE_AHB + 0x04000) |
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#define RNG_BASE (PERIPH_BASE_AHB + 0x05000) |
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#define AES_BASE (PERIPH_BASE_AHB + 0x06000) |
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#define GPIO_PORT_A_BASE (IOPORT_BASE + 0x00000) |
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#define GPIO_PORT_B_BASE (IOPORT_BASE + 0x00400) |
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#define GPIO_PORT_C_BASE (IOPORT_BASE + 0x00800) |
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#define GPIO_PORT_D_BASE (IOPORT_BASE + 0x00c00) |
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#define GPIO_PORT_H_BASE (IOPORT_BASE + 0x01C00) |
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/* Device Electronic Signature */ |
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#define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7C) |
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#define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x50) |
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#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE) |
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#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4) |
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#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 0x14) |
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/* ST provided factory calibration values @ 3.0V */ |
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#define ST_VREFINT_CAL MMIO16((INFO_BASE + 0x78)) |
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#define ST_TSENSE_CAL1_30C MMIO16((INFO_BASE + 0x7A)) |
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#define ST_TSENSE_CAL2_110C MMIO16((INFO_BASE + 0x7E)) |
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#endif |
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@ -0,0 +1,44 @@ |
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##
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## This file is part of the libopencm3 project.
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##
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## Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
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##
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## This library is free software: you can redistribute it and/or modify
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## it under the terms of the GNU Lesser General Public License as published by
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## the Free Software Foundation, either version 3 of the License, or
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## (at your option) any later version.
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##
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## This library is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU Lesser General Public License for more details.
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##
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## You should have received a copy of the GNU Lesser General Public License
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## along with this library. If not, see <http://www.gnu.org/licenses/>.
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##
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LIBNAME = libopencm3_stm32l0 |
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SRCLIBDIR ?= ../.. |
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PREFIX ?= arm-none-eabi |
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#PREFIX ?= arm-elf
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CC = $(PREFIX)-gcc |
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AR = $(PREFIX)-ar |
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CFLAGS = -Os -g \
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-Wall -Wextra -Wimplicit-function-declaration \
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-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
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-Wundef -Wshadow \
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-I../../../include -fno-common \
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-mcpu=cortex-m0 $(FP_FLAGS) -mthumb -Wstrict-prototypes \
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-ffunction-sections -fdata-sections -MD -DSTM32L0 |
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ARFLAGS = rcs |
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OBJS = gpio.o |
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OBJS += gpio_common_all.o gpio_common_f0234.o |
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VPATH += ../../usb:../:../../cm3:../common |
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include ../../Makefile.include |
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@ -0,0 +1,31 @@ |
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/** @defgroup gpio_file GPIO
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* |
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* @ingroup STM32L0xx |
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* |
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* @brief <b>libopencm3 STM32L0xx General Purpose I/O</b> |
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* |
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* @version 1.0.0 |
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* |
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* @date 8 September 2014 |
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* |
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* LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#include <libopencm3/stm32/gpio.h> |
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@ -0,0 +1,106 @@ |
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/* |
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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/* Generic linker script for STM32 targets using libopencm3. */ |
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/* Memory regions must be defined in the ld script which includes this one. */ |
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/* Enforce emmition of the vector table. */ |
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EXTERN (vector_table) |
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/* Define the entry point of the output file. */ |
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ENTRY(reset_handler) |
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/* Define sections. */ |
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SECTIONS |
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{ |
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.text : { |
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*(.vectors) /* Vector table */ |
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*(.text*) /* Program code */ |
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. = ALIGN(4); |
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*(.rodata*) /* Read-only data */ |
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. = ALIGN(4); |
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} >rom |
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/* C++ Static constructors/destructors, also used for __attribute__ |
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* ((constructor)) and the likes */ |
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.preinit_array : { |
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. = ALIGN(4); |
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__preinit_array_start = .; |
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KEEP (*(.preinit_array)) |
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__preinit_array_end = .; |
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} >rom |
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.init_array : { |
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. = ALIGN(4); |
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__init_array_start = .; |
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KEEP (*(SORT(.init_array.*))) |
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KEEP (*(.init_array)) |
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__init_array_end = .; |
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} >rom |
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.fini_array : { |
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. = ALIGN(4); |
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__fini_array_start = .; |
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KEEP (*(.fini_array)) |
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KEEP (*(SORT(.fini_array.*))) |
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__fini_array_end = .; |
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} >rom |
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/* |
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* Another section used by C++ stuff, appears when using newlib with |
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* 64bit (long long) printf support |
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*/ |
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.ARM.extab : { |
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*(.ARM.extab*) |
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} >rom |
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.ARM.exidx : { |
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__exidx_start = .; |
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*(.ARM.exidx*) |
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__exidx_end = .; |
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} >rom |
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. = ALIGN(4); |
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_etext = .; |
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.data : { |
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_data = .; |
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*(.data*) /* Read-write initialized data */ |
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. = ALIGN(4); |
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_edata = .; |
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} >ram AT >rom |
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_data_loadaddr = LOADADDR(.data); |
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.bss : { |
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*(.bss*) /* Read-write zero initialized data */ |
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*(COMMON) |
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. = ALIGN(4); |
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_ebss = .; |
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} >ram |
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/* |
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* The .eh_frame section appears to be used for C++ exception handling. |
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* You may need to fix this if you're using C++. |
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*/ |
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/DISCARD/ : { *(.eh_frame) } |
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. = ALIGN(4); |
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end = .; |
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} |
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PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram)); |
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