Set Vector Table Offset to memory location of our vector table.
Since we put the whole programm including the vector table into
memory, we need to make use of the Cortex-M4 system control block
Vector Table Offset Register (VTOR).
Freescale Vybrid is a familiy of ARM SoC, wheras the VF6xx models
have two cores in one SoC, a Cortex-A5 and a Cortex-M4. This adds
initial support for the Cortex-M4 in the libopencm3 library.
By using two different ram areas (pc_ram and ps_ram) the user can
put the code in a RAM area bounded to the code bus. The data can
be stored in the data area. However, currently the initial values
of for the variables in the data section are stored in the code
section and copied to the ram section by the initialization code
(like it's copied from ROM to RAM on microcontrollers).
these register definitions are common to all cortex mcus. some of the
registers might not be implemented everywhere (especially the floating
point registers), but defining them does no harm.
this modification does not result in any changes in the example
binaries.
the cortex generic interrupts get moved to lib/cm3/vector.c, the
platorms' individual irq names, initialization and handler prototypes go
to platoform specific irq.h files.
as the vector.c file heavily depends on platoform specific headers, it
can't be built once-and-for-all in lib/cm3/, so there are inclusion
stubs in the various architecture dirs; this might be better solved with
Makefile / include path handling.
one particular file is lib/lpc43xx/vector.c; that platform's
initialization code contains an additional section to copy everything
from flash to ram (which probably performs better there). that code
still resides in the inclusion stub, and gets mashed in using defines.
would need a cleaner implementation together with the Makefile solution.
this commit contains some files of the upcoming efm32 branch, from which
it was cherry-picked.
the .bin files produced from before and after this commit only differ in
lpc43xx, where the startup sequence was subtly modified.
That way, data source address does not depend on any other unrelated change in
linker script.
This also fixes cases when .data input section is aligned on 8 bytes. The new
version does not provide any address for the output section so that it is
aligned to the strictest input section. The _data_loadaddr symbol will
always take this alignment into account.