Values from RM0351rev1, with the correction of the duplicate TIM1_CC entry.
Only stub support so far, but this opens up the beginning of build testing.
Most changes are noise from doxygen.
Readme udpated to explain newer FP_FLAGS for m7
stm32f7 library is skipped if the toolchain doesn't support it yet.
Freescale Vybrid is a familiy of ARM SoC, wheras the VF6xx models
have two cores in one SoC, a Cortex-A5 and a Cortex-M4. This adds
initial support for the Cortex-M4 in the libopencm3 library.
By using two different ram areas (pc_ram and ps_ram) the user can
put the code in a RAM area bounded to the code bus. The data can
be stored in the data area. However, currently the initial values
of for the variables in the data section are stored in the code
section and copied to the ram section by the initialization code
(like it's copied from ROM to RAM on microcontrollers).
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.
We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
only contain one statement. Otherwise it is easy to introduce an
error.
Checkpatch needs to be adapted to reflect those changes.
Add an "#ifdef(LM4F)" clause to include/libopencm3/dispatch/nvic.h
and lib/dispatch/vector_nvic.c. This compiles in the vector table
and allows interrupts to be used.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
the LM3S irq list was previously unused as it was missing in the
dispatch files; now it got added. (before HEAD^, it wouldn't have made
any difference because the discriminating constant wasn't defined
anyway)
also, this enhances the warning messages
Kuldeep Singh Dhaka
Karl Palsson
Frantisek Burian
Stefan Agner
Felix Held
Federico Ruiz Ugalde
Ben Gamari
Piotr Esden-Tempski
Gareth McMullin
Gareth McMullin
Alexandru Gagniuc
Silvio Gissi
chrysn