STM32G4 uses v2 ADC but has EXTSEL and ALIGN fields modified, rather
than making a v3 ADC for these minor changes, the definitions have been
moved to the chip specific headers, so that the common code can work for
G4 onwards.
Allows for abstraction for code that's dependent on knowing the source clock
for a peripheral. Implemented a few core peripherals that tend to have clock
tree differences between platforms (USART, timers, I2C, SPI).
We still need stub .c files as we're using shared common files, so .d
tracking doesn't work. It lets us setup basic introductory text anyway,
and there will be .c files eventually, so acceptable.
The random number generator on the STM32H7 is identical to the v1 RNG
already present in the library. So use that, and make sure that the RCC
knows about the peripheral.
Originally filed at: https://github.com/libopencm3/libopencm3/pull/1244
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
* whitespace changes from review
Originally tracked at https://github.com/libopencm3/libopencm3/pull/958
While it doesn't work for everyone, this is clearly the basic first
steps required for any progress to be made.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Verify all hardware differences between F1 and F4/F7 Ethernet hardware.
Flags registers missing on F1 as well.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Wrong since original commit in 2013.
LCD code can't actually automatically determine clock speed if it's HSE,
as we don't know here whether what HSE is, nor what it's divided by.
For more fun, that old 2014 API doesn't have any way of flagging that it
failed either. Hooray.
We did have
* _HPRE_SYSCLK_DIVN (3 parts)
* _HPRE_DIVN (5 parts)
* _HPRE_DIV_N (4 parts)
Unify all on _HPRE_DIVN. Provide deprecated definitions to not break
everything at once.
Also, standardize on "NODIV" instead of DIVNONE.
These defines were simply a word containing the number, instead of the
number itself. This provides no value, and implies that there's a
limited set of values. The list was _already_ incomplete, so
misleading, _and_ just noise to maintain. Burn it all.
(well, burn it just a little bit, provide deprecated aliases on the old
values so that code keeps compiling)
The order of the UCPD1 and UCPD2 bits as described by the
rcc_periph_clken and rcc_periph_rst enums is swapped with regard to the
datasheet. Swap them.
Fixes: https://github.com/libopencm3/libopencm3/issues/234
uses the new mechanisms introduced to address a similar problem on F7.
Tested on a medium density part (0x429) that returns the same ids as
before, tested on a high density part that now _doesnt_, but that's now
correct :)