Piotr Esden-Tempski
b72a3640b3
[CM0] Disabled sync for LPC43xx/M0.
We are currently using the same code for CM0 CM3 and CM4 cores. This
patch is a bodge that disables sync on the LPC43xx/M0 core, it would be
nicer to probably implement a dispatch system similar to the one used in
stm32 peripheral support so that we can accomodate the different
features of the cortex cores. I (esden) assume we will run into more
incompatibilities in the future between the cortex cores.
12 years ago
Ben Gamari
cd1f6fac80
sync.h: Fix spelling
12 years ago
Ben Gamari
11ea9b090c
sync: Add comment
12 years ago
Ben Gamari
78081bd794
lpc43xx: Add irq.yaml for M0 core
12 years ago
Ben Gamari
c25461dfce
lpc43xx: Move M4 specific files to m4/
12 years ago
Ben Gamari
3ab761d244
Remove dead lpc43xx_m0/vector.c
12 years ago
Ben Gamari
9aa2f82164
lpc32xx_ram_only.ld: Fix region name
12 years ago
Ben Gamari
8eb5fba93b
lpc43xx/uart: Fix code style
12 years ago
Ben Gamari
fa47bb80d5
lpc43xx/uart: Fix TER register definition
I'm not sure why bit 7 and offset 0x30 were used previously. Revision
1.6 of UM10503 claims that the TXEN bit is bit 0 in all UARTs' TER
registers.
12 years ago
Ben Gamari
dbf9c3bc39
lpc43xx/uart: Kill _BITMASK definitions for single-bit fields
12 years ago
Ben Gamari
b0550ce0bf
lpc43xx/uart: Uncomment register definitions
12 years ago
Ben Gamari
2b027cf2de
Makefile: Install everything in scripts/
12 years ago
Ben Gamari
8201703e64
lpc43xx/ssp: Fix duplicate function definition from merge
12 years ago
Ben Gamari
994e679fb8
lpc43xx: Clean up linker script breakage from merge
12 years ago
Ben Gamari
580be39e47
lpc43xx: Convert register definitions to YAML
12 years ago
Ben Gamari
4fd218ad4c
lpc43xx/gen.py: Take YAML input
12 years ago
Ben Gamari
4d6a5d9606
lpc43xx: Move YAML OrderedDict code to separate module
12 years ago
Ben Gamari
21e4d4600f
lpc43xx: Add script to convert CSV files to YAML
12 years ago
Ben Gamari
036cb51676
lpc43xx/gpdma.csv: Fix INTSTAT register name
12 years ago
Ben Gamari
e8af7a98ee
lpc43xx/ssp: Add ssp_transfer
12 years ago
Ben Gamari
0d29b1d2d6
lpc43: Use uint*_t instead of u*
12 years ago
Ben Gamari
26162762b7
lpc43xx: Update linker scripts
12 years ago
Ben Gamari
fa9fa986df
lpc43xx/uart: Add missing BEGIN/END_DECLS
12 years ago
Ben Gamari
17fd708f66
Move lpc43xx and lpc43xx_m0 code to lpc43xx/ hierarchy
Previously there were nasty dependency issues causing M4 objects to be
linked into the M0 library
12 years ago
Hoernchen
16424d1c69
m0: remove useless remap
The m4 will 1) remap 2) start the m0, so it already is remapped, if it's
not, then we'd never execute this code anyway.
12 years ago
Hoernchen
4c8d260232
make sure the m0 is really running/stopped
12 years ago
TitanMKD
e5a4dd0609
Cleanup M0 makefile to avoid copying file from lpc43xx(M4) directory.
12 years ago
TitanMKD
786e3215a4
Fixed a problem with rom to ram. (which can produce error "cannot move location counter backwards")
12 years ago
TitanMKD
0dec187fee
lpc43xx basic IPC for multicore M4 & M0 (with basic examples for hackrf jellybean).
12 years ago
TitanMKD
439957155b
Added SGPIO structure for faster/better code generation (especially when optimized with -O2/-O3).
This structure is compliant with LPC43xx User Manual UM10503 Rev.1.4 - 3 September 2012.
12 years ago
TitanMKD
edab264704
Added _data_rom / _edata_rom for ld ram only and standard spifi ld Fixed ROM to RAM copy of ".data"
12 years ago
Jared Boone
f4e45e74bc
Add a duty cycle count argument to i2c0_init() to adjust for changes in APB1 clock.
12 years ago
Jared Boone
18bcbc3d28
Consolidate ssp_read and ssp_write into a single function, ssp_transfer. SSP bus transfers are bi-directional -- when bytes are written, they are also read.
12 years ago
Jared Boone
25d7853422
Switch ssp.c to using CGU #defines instead of local #defines.
12 years ago
Michael Ossmann
0f180ceffd
do not try to install scripts/data
12 years ago
Jared Boone
df922b9021
Corrected GPDMA_INTSTAT #define name typo.
12 years ago
Jared Boone
b44631f3b1
Removed #defines for GPDMA channel base addresses, changed "API" on other #defines to accept an ordinal instead.
12 years ago
Jared Boone
78884cef16
Changed GPDMA_CHANNELx #defines to use correct ("GPDMA_BASE") value as peripheral base address.
12 years ago
Jared Boone
0dc4443e26
Renamed DMA_BASE to GPDMA_BASE to match peripheral name (and #defines in gpdma.h).
12 years ago
Jared Boone
518b97efb6
Added generated headers and hand-crafted #defines for register fields common across many register sets.
12 years ago
Jared Boone
8abefef07d
Rename indexed #define macros for channel-specific GPDMA registers, to match documentation and avoid conflict with the GPDMA_CONFIG register name.
12 years ago
Jared Boone
e9eacc60ac
Change header generation script to produce function-like #define macros for single-bit fields, too.
12 years ago
Jared Boone
b1e5c77e1d
New SGPIO field #defines, generated from sgpio.csv.
12 years ago
Jared Boone
5359dd245e
Fixed typo in SGPIO_MUX_CFGx CLK_SOURCE_SLICE_MODE bit offset and width.
12 years ago
Jared Boone
18d72099a5
Changed ldscripts to use new RAM region names, placed .data/.bss/stack into separate local RAM region.
Added ldscript for RAM-only debugging over SWD or JTAG.
12 years ago
Jared Boone
ffffb71ba2
Added distinct _bss ldscript constant, in case .text and .bss are not contiguous.
12 years ago
Jared Boone
733c117c53
Added generalized #defines for USB0 ENDPTCTRL register fields.
12 years ago
Michael Ossmann
2946de9f5d
ritimer.csv
12 years ago
Michael Ossmann
922beb0730
gima.csv
12 years ago
Michael Ossmann
e3ad0c6dc8
gpio.csv
12 years ago