SCB.CCR.STKALIGN enables the automatic aligning of the stack pointer to 8 bytes
on interrupt entry. Per ARM recommendations, and for AAPCS compliance, this
bit should be enabled at all times. ARMv6M has this hardcoded to 1. Cortex M3
has this broken in rev 0, optional (default off) in rev 1, and optional
(default on) in rev 2 and later. M4(f) has optional (default on) for all
revisions, M7 has hardcoded to 1.
See Section 2.3.3 in ARM document IHI0046B:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf
To ensure that all parts behave correctly, we make sure that we hardcode the
feature on, for all parts. While not _required_ for anything other than rev1
cm3, inserting it into the common reset handler ensures no-one gets any
surprises.
Fixes Github issue #516
This moves the platform specific initialization function pre_main
in front of C++ constructors. This is especially necessary for
platforms which need to setup the stack pointer (pre_main itself
is inline, hence no stack needed for this function).
We are currently using the same code for CM0 CM3 and CM4 cores. This
patch is a bodge that disables sync on the LPC43xx/M0 core, it would be
nicer to probably implement a dispatch system similar to the one used in
stm32 peripheral support so that we can accomodate the different
features of the cortex cores. I (esden) assume we will run into more
incompatibilities in the future between the cortex cores.
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.
We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
only contain one statement. Otherwise it is easy to introduce an
error.
Checkpatch needs to be adapted to reflect those changes.
Adding this attribute allows to avoid warnings issued by GCC in cases
when 'scb_reset_system' is used as a last call in a function with
"noreturn" attribute set(usually reset handler of some sorts)
Fixes#51
There should be no reason for manually trying to load the stack. Cortex
devices can be programmed with only C, and any code that needed this
would indicate broken vectors.
the only change this results in in the example binaries is in the
hackrf-jellybean/systick example, where the the check in
systick_set_clocksource for overflowing from the stm32 area gets used.
these register definitions are common to all cortex mcus. some of the
registers might not be implemented everywhere (especially the floating
point registers), but defining them does no harm.
this modification does not result in any changes in the example
binaries.
the cortex generic interrupts get moved to lib/cm3/vector.c, the
platorms' individual irq names, initialization and handler prototypes go
to platoform specific irq.h files.
as the vector.c file heavily depends on platoform specific headers, it
can't be built once-and-for-all in lib/cm3/, so there are inclusion
stubs in the various architecture dirs; this might be better solved with
Makefile / include path handling.
one particular file is lib/lpc43xx/vector.c; that platform's
initialization code contains an additional section to copy everything
from flash to ram (which probably performs better there). that code
still resides in the inclusion stub, and gets mashed in using defines.
would need a cleaner implementation together with the Makefile solution.
this commit contains some files of the upcoming efm32 branch, from which
it was cherry-picked.
the .bin files produced from before and after this commit only differ in
lpc43xx, where the startup sequence was subtly modified.
Adds libopencm3/cm3/assert.h header that provides assertion check macros
similar to those provided by the standard C library.
Thanks to Nicolas Schodet for help.
Forrest Voight
Oliver Meier
Stefan Agner
Karl Palsson
Karl Palsson
Frantisek Burian
Piotr Esden-Tempski
Ben Gamari
Fergus Noble
Nicolas Schodet
Andrey Smirnov
Felix Ruess
Norbert Braun
chrysn
Tomaz Solc