This commit shrinks the Makefile of the doxygen and makes easy error-prone addition of the new supported platforms.
The user should modify only one line at start of file to add new supported family to the build process.
The calling format is preserved and is compatible with old version of the makefile.
Add I/O mux controller which is required to mux pins according to
their used function. For all pads, the alternative function 0 is
GPIO. For different pin mux function refer to the reference manual.
This adds GPIO module support. GPIO can be controlled using the GPIO
number as stated in the reference manual, similar to Linux. Also
32-bit access to whole ports is possible. Reading a GPIO is possible
without muxing the pad as GPIO, however writing a GPIO needs the pad
to be muxed as GPIO.
This adds UART support for Vybrid VF6xx. Baud rate is calculated
from IPG clock, which need to be initialized by using the
ccm_calculate_clocks functions. Also clock need to be gated using
the ccm_clock_gate_enable function. Tested with an unitialized
UART with a baud rate of 115200.
Extend the clock controller module with a function to calculate
core clocks from the current registers settings. On Vybrid, we
assume that the core clocks are setup by the main operating system
running on the Cortex-A5. Nevertheless we need to know their actual
values in order to calculate other clocks or baud rates.
Verified on a Colibri VF61, which calculates following values:
ccm_core_clk: 500210526
ccm_platform_bus_clk: 166736842
ccm_ipg_bus_clk: 83368421
Add initial memorymap for Vybrid VF6xx module. Also add the clock
control module which allows to control system clocks and enable
clocks of individual pheripherials.
Set Vector Table Offset to memory location of our vector table.
Since we put the whole programm including the vector table into
memory, we need to make use of the Cortex-M4 system control block
Vector Table Offset Register (VTOR).
Freescale Vybrid is a familiy of ARM SoC, wheras the VF6xx models
have two cores in one SoC, a Cortex-A5 and a Cortex-M4. This adds
initial support for the Cortex-M4 in the libopencm3 library.
By using two different ram areas (pc_ram and ps_ram) the user can
put the code in a RAM area bounded to the code bus. The data can
be stored in the data area. However, currently the initial values
of for the variables in the data section are stored in the code
section and copied to the ram section by the initialization code
(like it's copied from ROM to RAM on microcontrollers).
Fix regresion from 5d4437fe43 where
somehow not all occurrences were replaced. I could swear it all
compiled when I was working on it :(
Reported-by: Trevor Woerner <trevor.woerner@linaro.org>
This moves the platform specific initialization function pre_main
in front of C++ constructors. This is especially necessary for
platforms which need to setup the stack pointer (pre_main itself
is inline, hence no stack needed for this function).
Latest versions of all reference manuals refer to the address as SPIx_BASE, and
simply name some of the individual registers as SPI_I2SXXXX. Likewise, the
interrupts are simply SPIx, not SPIx/I2Sx. Rather than hacking more duplicates
into the F0 and L0 parts where this was turning up, remove the pointless _I2S_
from SPI2/SPI3 and make it all consistent
Compile tested only, with the examples collection.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#331Fixes#347
There's more exti lines on many more devices now. F0 and F3 have extras, as did
L1 and L0. There's no real reason not to have higher order EXTI definitions
defined at the top level, and it reduces the number of files to merge together
to find all definitions for the bigger devices.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Fixes#338
When full path of a source directory has spaces in it, that makes
shell and Make split the path, so special treatment is
necessary. Additionally, @F doesn't honour the escaping, so has to be
avoided.
Reported-by: Roman Faizullin <roman@faizullin.info>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
All methods in this file are in either
* common/gpio_common_all.c
* common/gpio_common_f0234.c
Those other files have better doxygen commentary, this file should never
have been added.
The CCxP/CCxNP bits are actually separated by a reserved bit, so the
correct mask is 0xa, (0b1010) not 0x6 (0b0110)
Reported by PyroDevil on the mailinglist
In a composite device if one want to separate code
for each interface, usbd_register_set_config_callback
can now register more than one callback.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
GPIO pins should be configured for Analog IN on virtually all families
to reduce parasitic consumption.
Reported-by: Roger Wolff <R.E.Wolff@BitWizard.nl>
Frantisek Burian
Stefan Agner
Enrico Jorns
Freek van Tienen
Karl Palsson
Michael Spieler
Geoffrey Hausheer
Karl Palsson
Paul Fertser
Nippius
Norbert Braun
Franck Jullien
Pavol Rusnak
Felix Ruess
Roger Wolff
Ken Sarkies