It's simply a wrapper around rcc_reset_pulse already.
Just drop it. See 034dbf20ff for the same deletion for timers.
Signed-off-by: Karl Palsson <karlp@tweak.au>
It's simply a wrapper around rcc_reset_pulse already.
Just drop it. See 034dbf20ff for the same deletion for timers.
Signed-off-by: Karl Palsson <karlp@tweak.au>
Fixes: https://github.com/libopencm3/libopencm3/issues/1446
Fixes: 18f4d7c1b7 stm32f3: rtc: include correct shared header
No testing on real hardware, but the docs imply that this should have
always had the "basic" rtc-v2 peripheral.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
- rcc_get_i2c_clk_freq: Add support by taking RCC_CCIPR2 into account for I2C4.
- rcc_get_timer_clk_freq: Add support for LP timers
- rcc_get_usart_clk_freq: Fix APB freq used for LPUART1 and UART1, respectively.
This commit adds support for NRF52 TWI Master mode and slightly extends
existing I2C API. This is a breaking change, while mode selection needs to be
done during enabling I2C. There is one additional breaking change done because:
1) Unicore MX API design was PITA for writes
2) It is incompatible with EasyDMA
I strongly apologize to all two users who might be affected by this change.
by making it vaguer. These days, there's extra timers that support the
BDTR register, so the simple "advanced" timer description is no longer
sufficiently clear. You have to check your particular reference manual.
Fixes: https://github.com/libopencm3/libopencm3/issues/1378
* merged: nrf tree from unicore-mx
* fixed: small changes to make merged code play with rest of locm3 again
* added: linker script generator defines for nRF51/52 stubs
* added: doxygen support
This removes code and changes names and styles where relevant to be more
inline with normal libopencm3.
NRF52x library is built for hardfloat, M4F by default. The M4 no float
variants are less common, and if needed, the library can be built
manually for those variants. Unless some very common boards show up
using those parts, we don't need an extra library build.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Tested-by: Karl Palsson <karlp@tweak.net.au>
F411 parts, found on "black pill" boards support 100MHz operation,
but only 96MHz with USB. Provide default clock structures for this
common max speed.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Fix the bug that the iwdg counter is not refreshed after the configurationis complete, if this counter is not refreshed after the configuration is completed, the first iwdg counting period will be as long as 26 seconds.
Fixes: https://github.com/libopencm3/libopencm3/pull/1333
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Nothing extra needed to be defined here - this might've just been missed
when adding STM32G0 support. Tested and works well on an STM32G051. Registers
in `stm32/common/dac_common_v1.h` match the STM32G0x1 reference manual.
Fix FDCAN FIFO acknowledge register definition to make it correct for H7
MCUs. Previous definition contained hardcoded offset instead of using
MCU-specific macro.
Fix incorrect decoding of buffer element size. During decoding, value
returned was erratically set to 7 instead of setting 4th LSB. Buffer
element size was then always reported as 15 bytes.
Fix incorrect way of acknowledging FIFO processing. Old code ORed old
value of register with index of FIFO buffer just processed, which
generated invalid value for acknowledge. This caused FIFO to repeatedly
returning same content. Both fdcan_receive() and fdcan_release_fifo were
affected.
Added some descriptions for missing parameters, (hopefully) clarified
some along the way. Fixed all can related warnings in doxygen logs.
Added doxgen tags where meaningful comments had been provided. Dropped
redundant comment separators.
Add stm32h7 support for FDCAN peripheral. Source level compatibility is
provided with stm32g4. Additional features of stm32h7 such as
configurable buffers are supported. Implementation offers feature parity
with stm32g4 implementation.
Add stm32g4 support for FDCAN peripheral. Normal / FDCAN operation
supported, bitrate switching and filtering supported via API.
Timestamping and transmit event buffer support in API are TBD.
Originally tracked as: https://github.com/libopencm3/libopencm3/pull/1317
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Worked in nuances for differences between versions of STM32H7 devices, such as
handling of ODEN, explicit SCUEN bit, and different VOS mappings. This has
been validated on the STM32H7A3 and STM32H743 MCUs.
Old API required users to manually construct bit maps frm opaquely named
defines, with little help. It also was a pure OR operation, with no way
to ever clear bits.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Karl Palsson
Karl Palsson
Karl Palsson
Oskar
andrej
hepoun
Vlad Logyin
me@me.net
Stefan Tauner
Eduard Drusa
mikisama
Tim Børresen
Bastian de Byl
weycen76
Stephen Holdaway
Jean THOMAS
Brian Viele
Gwenhael Goavec-Merou
Stijn Martens
Ben Brewer
Kejia Hu