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171 lines
3.7 KiB
171 lines
3.7 KiB
/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/usart.h>
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#if defined(STM32F1)
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# include <libopencm3/stm32/f1/rcc.h>
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#elif defined(STM32F2)
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# include <libopencm3/stm32/f2/rcc.h>
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#elif defined(STM32F4)
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# include <libopencm3/stm32/f4/rcc.h>
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#else
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# error "stm32 family not defined."
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#endif
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void usart_set_baudrate(u32 usart, u32 baud)
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{
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u32 clock = rcc_ppre1_frequency;
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//#ifdef STM32F1
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if (usart == USART1) {
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clock = rcc_ppre2_frequency;
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}
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/* This has to be added for F2 when it get's support for USART6 */
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/*
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#else
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if ((usart == USART1) ||
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(usart == USART6)) {
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clock = rcc_ppre2_frequency;
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}
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#endif
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*/
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/*
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* Yes it is as simple as that. The reference manual is
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* talking about fractional calculation but it seems to be only
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* marketting babble to sound awesome. It is nothing else but a
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* simple divider to generate the correct baudrate.
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*
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* Note: We round() the value rather than floor()ing it, for more
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* accurate divisor selection.
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*/
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USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
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}
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void usart_set_databits(u32 usart, u32 bits)
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{
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if (bits == 8)
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USART_CR1(usart) &= ~USART_CR1_M; /* 8 data bits */
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else
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USART_CR1(usart) |= USART_CR1_M; /* 9 data bits */
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}
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void usart_set_stopbits(u32 usart, u32 stopbits)
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{
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u32 reg32;
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reg32 = USART_CR2(usart);
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reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits;
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USART_CR2(usart) = reg32;
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}
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void usart_set_parity(u32 usart, u32 parity)
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{
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u32 reg32;
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reg32 = USART_CR1(usart);
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reg32 = (reg32 & ~USART_PARITY_MASK) | parity;
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USART_CR1(usart) = reg32;
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}
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void usart_set_mode(u32 usart, u32 mode)
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{
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u32 reg32;
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reg32 = USART_CR1(usart);
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reg32 = (reg32 & ~USART_MODE_MASK) | mode;
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USART_CR1(usart) = reg32;
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}
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void usart_set_flow_control(u32 usart, u32 flowcontrol)
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{
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u32 reg32;
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reg32 = USART_CR3(usart);
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reg32 = (reg32 & ~USART_FLOWCONTROL_MASK) | flowcontrol;
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USART_CR3(usart) = reg32;
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}
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void usart_enable(u32 usart)
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{
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USART_CR1(usart) |= USART_CR1_UE;
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}
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void usart_disable(u32 usart)
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{
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USART_CR1(usart) &= ~USART_CR1_UE;
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}
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void usart_send(u32 usart, u16 data)
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{
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/* Send data. */
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USART_DR(usart) = (data & USART_DR_MASK);
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}
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u16 usart_recv(u32 usart)
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{
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/* Receive data. */
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return USART_DR(usart) & USART_DR_MASK;
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}
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void usart_wait_send_ready(u32 usart)
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{
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/* Wait until the data has been transferred into the shift register. */
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while ((USART_SR(usart) & USART_SR_TXE) == 0);
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}
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void usart_wait_recv_ready(u32 usart)
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{
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/* Wait until the data is ready to be received. */
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while ((USART_SR(usart) & USART_SR_RXNE) == 0);
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}
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void usart_send_blocking(u32 usart, u16 data)
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{
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usart_wait_send_ready(usart);
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usart_send(usart, data);
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}
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u16 usart_recv_blocking(u32 usart)
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{
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usart_wait_recv_ready(usart);
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return usart_recv(usart);
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}
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void usart_enable_rx_dma(u32 usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAR;
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}
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void usart_disable_rx_dma(u32 usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAR;
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}
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void usart_enable_tx_dma(u32 usart)
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{
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USART_CR3(usart) |= USART_CR3_DMAT;
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}
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void usart_disable_tx_dma(u32 usart)
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{
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USART_CR3(usart) &= ~USART_CR3_DMAT;
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}
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