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debug lfs 

Signed-off-by: surenyi <surenyi82@163.com>
master
surenyi 2 weeks ago
parent
cd6226fb54
commit
8fa064739f
11 changed files with 2336 additions and 1245 deletions
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  1. 2
      .clang-format
  2. 3
      config.h
  3. 2
      ft2000-4.h
  4. 30
      hwconf.c
  5. 347
      sysLib.c
  6. 17
      usrStubs.c
  7. 842
      vxbFtSpi.c
  8. 9
      vxbFtSpi.h
  9. 501
      vxbLfsLib.c
  10. 178
      vxbSm2130SpiDev.c
  11. 22
      vxbSm2130SpiDev.h

2
.clang-format
View File

@ -53,7 +53,7 @@ BreakConstructorInitializersBeforeComma: false
BreakConstructorInitializers: BeforeComma
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 80
ColumnLimit: 120
CommentPragmas: '^ IWYU pragma:'
CompactNamespaces: false
ConstructorInitializerAllOnOneLineOrOnePerLine: false

3
config.h
View File

@ -101,6 +101,7 @@ extern "C" {
#define INCLUDE_DISK_UTIL
#endif
#define DRV_FS_LITTLEFS 1
/*#define INCLUDE_HRFS*/
#define DRV_VXBEND_FTGMAC
@ -190,7 +191,7 @@ extern "C" {
#define SPI_BOOTROM_SIZE (0x400000)
#define SPI_KERNEL_SIZE (0x600000)
#ifdef INCLUDE_TFFS
#if defined(INCLUDE_TFFS) || defined(DRV_FS_LITTLEFS)
# define INCLUDE_TFFS_MOUNT
# define INCLUDE_TFFS_SHOW

2
ft2000-4.h
View File

@ -97,6 +97,8 @@ enum can_bitrate{
#define REG208 0x208
#define REG210 0x210
#define REG214 0x214
#define REG218 0x218
#define CAN_TXD_0 (1<<24)
#define CAN_RXD_0 (1<<12)
#define CAN_TXD_1 (1<<20)

30
hwconf.c
View File

@ -259,21 +259,29 @@ struct hcfResource qspiResources[] = {
#endif /* DRV_FTQSPI */
#ifdef DRV_FTSPI
struct vxbSpiDevInfo spiDevTbl1[] = {
struct vxbSpiDevInfo sm2130DevRes[] = {
/* name cs width freq mode */
{ "SM2130", 0, 8, 5000000, 3},
};
struct hcfResource spiResources0[] = {
{ "regBase", HCF_RES_INT, { (void *)(FTSPI0_BASE) } },
{ "clkFreq", HCF_RES_INT, { (void *)(FT2000_SPI_CLK) } },
{ "speed", HCF_RES_INT, { (void *)(4000000) } },
{ "mode", HCF_RES_INT, { (void *)3} },
};
#define spiNum0 NELEMENTS(spiResources0)
struct hcfResource spiResources1[] = {
{ "regBase", HCF_RES_INT, { (void *)(FTSPI1_BASE) } },
{ "clkFreq", HCF_RES_INT, { (void *)(FT2000_SPI_CLK) } },
{ "speed", HCF_RES_INT, { (void *)(4000000) } },
{ "mode", HCF_RES_INT, { (void *)3} },
{ "spiDev", HCF_RES_ADDR, { (void *)&spiDevTbl1[0]} },
{ "spiDevNum", HCF_RES_INT, { (void *)NELEMENTS(spiDevTbl1)}},
{ "spiDev", HCF_RES_ADDR, { (void *)&sm2130DevRes[0]} },
{ "spiDevNum", HCF_RES_INT, { (void *)NELEMENTS(sm2130DevRes)}},
};
#define spiNum1 NELEMENTS(spiResources1)
#endif /* DRV_FTQSPI */
#endif /* DRV_FTSPI */
#ifdef DRV_FTI2C
@ -506,6 +514,16 @@ struct hcfResource gmac1Resources[] = {
#define gmac1Num NELEMENTS(gmac1Resources)
#endif /* DRV_VXBEND_FTGMAC */
#ifdef DRV_FS_LITTLEFS
struct hcfResource lfsResources[] = {
{ "mountPoint" , HCF_RES_STRING, {(void *)"/lfs0"}},
{ "flashName" , HCF_RES_STRING, {(void *)TFFS_PART0_FLASH_NAME}},
{ "flashOffset", HCF_RES_INT, {(void *)(TFFS_PART0_FLASH_BOOT_SIZE)}},
{ "flashSize" , HCF_RES_INT, {(void *)((TFFS_PART0_FLASH_SIZE) - (TFFS_PART0_FLASH_BOOT_SIZE))}},
};
#define lfsResNum NELEMENTS(lfsResources)
#endif
const struct hcfDevice hcfDeviceList[] = {
#ifdef DRV_ARM_GICV3
{ "armGicDev", 0, VXB_BUSID_PLB, 0, armGICv3Num, armGICv3Resources},
@ -557,6 +575,7 @@ const struct hcfDevice hcfDeviceList[] = {
#endif
#ifdef DRV_FTSPI
{ FT_SPI_NAME, 0, VXB_BUSID_PLB, 0, spiNum0, spiResources0 },
{ FT_SPI_NAME, 1, VXB_BUSID_PLB, 0, spiNum1, spiResources1 },
#endif
@ -564,6 +583,9 @@ const struct hcfDevice hcfDeviceList[] = {
{ "ftGpio", 0, VXB_BUSID_PLB, 0, gpioDev0Num, gpioDev0Resources },
{ "ftGpio", 1, VXB_BUSID_PLB, 0, gpioDev1Num, gpioDev1Resources },
#endif
#ifdef DRV_FS_LITTLEFS
{ "lfs", 0, VXB_BUSID_PLB, 0, lfsResNum, lfsResources},
#endif
};
const int hcfDeviceNum = NELEMENTS(hcfDeviceList);

347
sysLib.c
View File

@ -1,3 +1,4 @@
/* vim: set ts=4 sw=4 et fdm=marker: */
/* sysLib.c - system-dependent routines */
/*
@ -7,7 +8,6 @@
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*/
/* includes */
#include <vxWorks.h>
@ -74,8 +74,7 @@ IMPORT void sysSerialConnectAll (void);
#include "vxbM6845Vga.c" /* X100 VGA */
#endif
typedef struct arm_smc_regs
{
typedef struct arm_smc_regs {
int a0;
int a1;
int a2;
@ -99,8 +98,7 @@ LOCAL SPIN_LOCK_ISR_DECL (rebootLock, 0);
/* Non-Boot CPU Start info. Managed by sysCpuEnable */
typedef struct sysMPCoreStartup_s
{
typedef struct sysMPCoreStartup_s {
UINT32 newPC; /* Address of 'C' based startup code */
UINT32 newSP; /* Stack pointer for startup */
UINT32 newArg; /* vxWorks kernel entry point */
@ -113,9 +111,10 @@ typedef struct sysMPCoreStartup_s
} sysMPCoreStartup_t;
extern sysMPCoreStartup_t sysMPCoreStartup[VX_SMP_NUM_CPUS];
extern unsigned int arm_mmu_ttbr;
IMPORT void lfsDevRegister(void);
IMPORT void sysInit(void);
IMPORT void sysInit32(void);
IMPORT void mmuCortexA8DacrSet(UINT32 dacrVal);
@ -163,14 +162,11 @@ IMPORT VOIDFUNCPTR _func_armIntStackSplit; /* ptr to fn to split stack */
* critical, they could be reduced.
*/
PHYS_MEM_DESC sysPhysMemDesc [] =
{
PHYS_MEM_DESC sysPhysMemDesc[] = {
{
LOCAL_MEM_LOCAL_ADRS, /* virtual address */
{ LOCAL_MEM_LOCAL_ADRS, /* virtual address */
LOCAL_MEM_LOCAL_ADRS, /* physical address */
LOCAL_MEM_SIZE,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_WRITEALLOCATE_MSK,
LOCAL_MEM_SIZE, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_WRITEALLOCATE_MSK,
#if defined(_WRS_CONFIG_SMP) /* needs to be shared */
MMU_ATTR_VALID | MMU_ATTR_SUP_RWX | MMU_ATTR_WRITEALLOCATE_SHARED
#else
@ -178,84 +174,45 @@ PHYS_MEM_DESC sysPhysMemDesc [] =
#endif /* _WRS_CONFIG_SMP */
},
{
PIN_DEMUX_BASE, /* pin MUX/DEMUX */
PIN_DEMUX_BASE,
0x10000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
UART_0_BASE_ADR, /* UART */
UART_0_BASE_ADR,
0x18000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x28207000, /* CAN*/
0x28207000,
0x1000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x2820b000, /* GMAC*/
0x2820b000,
0x00009000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x29900000, /* GIC */
0x29900000,
0x100000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
FT_PCI_CONFIG_ADDR, /* PCI Memory address spcae */
FT_PCI_CONFIG_ADDR,
0x10000000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x50000000, /* PCI io32Addr */
0x50000000,
0x08000000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x58000000, /* PCI mem32Addr */
0x58000000,
0x27000000,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{ PIN_DEMUX_BASE, /* pin MUX/DEMUX */
PIN_DEMUX_BASE, 0x10000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ UART_0_BASE_ADR, /* UART */
UART_0_BASE_ADR, 0x18000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ 0x28207000, /* CAN*/
0x28207000, 0x1000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ 0x2820b000, /* GMAC*/
0x2820b000, 0x00009000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ 0x29900000, /* GIC */
0x29900000, 0x100000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ FT_PCI_CONFIG_ADDR, /* PCI Memory address spcae */
FT_PCI_CONFIG_ADDR, 0x10000000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ 0x50000000, /* PCI io32Addr */
0x50000000, 0x08000000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
{ 0x58000000, /* PCI mem32Addr */
0x58000000, 0x27000000, MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
#ifdef DRV_FTQSPI
{ /* Qspi BootRom */
SPI_FLASH_BASE_ADRS,
SPI_FLASH_BASE_ADRS,
SPI_BOOTROM_SIZE,
SPI_FLASH_BASE_ADRS, SPI_FLASH_BASE_ADRS, SPI_BOOTROM_SIZE,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RO | MMU_ATTR_DEVICE_SHARED
},
MMU_ATTR_VALID | MMU_ATTR_SUP_RO | MMU_ATTR_DEVICE_SHARED },
{ /* Qspi Flash */
SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE,
SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE,
SPI_FLASH_SIZE - SPI_BOOTROM_SIZE,
SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE, SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE, SPI_FLASH_SIZE - SPI_BOOTROM_SIZE,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED },
#endif
};
@ -270,10 +227,8 @@ char * sysBootLine = BOOT_LINE_ADRS; /* address of boot line */
char *sysExcMsg = EXC_MSG_ADRS; /* catastrophic message area */
int sysProcNum; /* processor number of this CPU */
/* locals */
/* defines */
/* externals */
@ -288,11 +243,8 @@ char * sysPhysMemTop (void);
/* included source files */
#include <mem/nullNvRam.c>
/*******************************************************************************
*
* sysModel - return the model name of the CPU board
@ -326,21 +278,15 @@ char * sysBspRev (void)
{
return (BSP_VERSION BSP_REV);
}
extern VIRT_ADDR mmuPhysToVirt
(
PHYS_ADDR physAddr /* physical address to be translated */
extern VIRT_ADDR mmuPhysToVirt(PHYS_ADDR physAddr /* physical address to be translated */
);
extern PHYS_ADDR mmuVirtToPhys
(
VIRT_ADDR virtAddr /* virtual address to be translated */
extern PHYS_ADDR mmuVirtToPhys(VIRT_ADDR virtAddr /* virtual address to be translated */
);
#ifndef _WRS_CONFIG_ARM_LPAE
extern void cacheCortexA9LibInstall (VIRT_ADDR (physToVirt)(PHYS_ADDR),
PHYS_ADDR (virtToPhys)(VIRT_ADDR));
extern void cacheCortexA9LibInstall(VIRT_ADDR(physToVirt)(PHYS_ADDR), PHYS_ADDR(virtToPhys)(VIRT_ADDR));
#else
extern void cacheCortexA15LibInstall (VIRT_ADDR (physToVirt)(PHYS_ADDR),
PHYS_ADDR (virtToPhys)(VIRT_ADDR));
extern void cacheCortexA15LibInstall(VIRT_ADDR(physToVirt)(PHYS_ADDR), PHYS_ADDR(virtToPhys)(VIRT_ADDR));
#endif
void writeq(int data, int addr)
{
@ -362,7 +308,6 @@ void v8_outer_disable_l3cache(void)
pstate = readq(0x3A200018 + i * 0x10000);
} while ((pstate & 0xf) != (0x1 << 2));
}
}
void v8_outer_cache_flush_all(void)
@ -403,9 +348,7 @@ void sysHwInit0 (void)
* RETURNS: N/A
*/
void sysMsDelay
(
UINT delay /* length of time in ms to delay */
void sysMsDelay(UINT delay /* length of time in ms to delay */
)
{
sysUsDelay(1000 * delay);
@ -427,7 +370,6 @@ void sysDelay (void)
LOCAL UINT32 genTimerFreq = 0;
/*******************************************************************************
*
* armGenGetSysCount - get system counter count
@ -443,12 +385,10 @@ LOCAL UINT64 armGenGetSysCount (void)
{
UINT64 count1;
_WRS_ASM("ISB");
count1 = __inline__GetPhyTimerCnt();
return count1;
}
@ -468,11 +408,7 @@ LOCAL void armGenGetFreq (void)
_WRS_ASM("MRC p15, 0, %0, c14, c0, 0" : "=r"(genTimerFreq));
}
#else
__asm volatile UINT32 __inline__GetCntFreq (void)
{
! "r0"
mrc p15, 0, r0, c14, c0, 0
}
__asm volatile UINT32 __inline__GetCntFreq(void){ !"r0" mrc p15, 0, r0, c14, c0, 0 }
LOCAL UINT32 armGenGetFreq(void)
{
@ -503,10 +439,7 @@ LOCAL UINT32 armGenGetFreq (void)
*\NOMANUAL
*/
void sysUsDelay
(
int us
)
void sysUsDelay(int us)
{
volatile UINT64 oldVal;
volatile UINT64 newVal;
@ -514,8 +447,7 @@ void sysUsDelay
volatile UINT64 totalDelta;
volatile UINT64 maxCount;
if (us <= 0)
{
if (us <= 0) {
printf("usDelay, wrong parameter: %d us\n", us);
return;
}
@ -524,19 +456,15 @@ void sysUsDelay
maxCount = 0xffffffffffffffffull;
oldVal = armGenGetSysCount();
while (incElapsed < totalDelta)
{
while (incElapsed < totalDelta) {
newVal = armGenGetSysCount();
if (newVal == oldVal)
continue;
if (newVal > oldVal)
{
if (newVal > oldVal) {
incElapsed += (newVal - oldVal);
}
else
{
} else {
incElapsed += ((maxCount - oldVal) + newVal);
}
@ -579,26 +507,64 @@ void sysHwInit (void)
// writeq(readq(PIN_DEMUX_BASE+REG204)|CAN_TXD_0|CAN_RXD_0|CAN_TXD_1|CAN_RXD_1,
// PIN_DEMUX_BASE+REG204); /* pad pin DeMux. enable CAN */
/* pin_mux:
/*
* pin_mux (SPI0):
* spi0_csn0_pad: spi0_csn0 gpio1_porta_5
* spi0_sck_pad: spi0_sck gpio1_porta_6
* spi0_so_pad: spi0_so gpio1_porta_7
* spi0_si_pad: spi0_si gpio1_portb_0
*/
unsigned int reg = readl(PIN_DEMUX_BASE + REG208);
reg &= ~((0x3 << 16) | (0x3 << 12) | (0x3 << 8) | (0x3 << 4));
writel(reg, PIN_DEMUX_BASE + REG208);
/*
* pin_mux (SPI1):
* uart_2_rxd_pad: uart_2_rxd spi1_csn0 gpio0_portb_5
* uart_2_txd_pad: uart_2_txd spi1_sck hda_sdi1
* uart_3_rxd_pad: uart_3_rxd spi1_so hda_sdi2
* uart_3_txd_pad: uart_3_txd spi1_si hda_sdi3
*/
/* SM2130 1553B SPI1 */
unsigned int reg = readl(PIN_DEMUX_BASE + REG210);
reg &= ~0x3;
reg |= 0x1; /* spi1_csn0 */
/* SPI1 */
reg = readl(PIN_DEMUX_BASE + REG210);
reg &= ~0xf;
reg |= 0x9; /* spi1_csn0 */
writel(reg, PIN_DEMUX_BASE + REG210);
reg = readl(PIN_DEMUX_BASE + REG214);
reg &= ~((0x3 << 28) | (0x3 << 24) | (0x3 << 20));
reg |= (1 << 28) | (1 << 24) | (1 << 20);
reg &= ~((0xf << 28) | (0xf << 24) | (0xf << 20));
reg |= (0x9 << 28) | (0x9 << 24) | (0x9 << 20); /* enable pullup */
writel(reg, PIN_DEMUX_BASE + REG214);
/*
* GPIO1_B7: SM2130_MR
* GPIO0_B6: SM2130_ACKIRQ
* GPIO0_B7: SM2130_READY
*
* qspi_csn1_pad: qspi_csn1 gpio1_portb_7
* qspi_csn2_pad: spi_csn2 spi1_csn1 gpio0_portb_6
* qspi_csn3_pad: qspi_csn3 spi1_csn2 gpio0_portb_7
*/
reg = readl(PIN_DEMUX_BASE + REG214);
reg &= ~((0x3 << 12) | (0x3 << 8) | (0x3 << 4));
reg |= (0x1 << 12) | (0x2 << 8) | (0x2 << 4);
writel(reg, PIN_DEMUX_BASE + REG214);
/*
* GPIO1_A4: SM2130_IRQ
*
* ext_lpc_lad_1_pad: ext_lpc_lad_1 gpio1_porta_4
*/
reg = readl(PIN_DEMUX_BASE + REG218);
reg &= ~(0x3 << 8);
reg |= (0x1 << 8);
writel(reg, PIN_DEMUX_BASE + REG218);
#ifdef DRV_X100DC
ftX100DcDevicePciRegister();
#endif
lfsDevRegister();
#ifdef INCLUDE_VXBUS
hardWareInterFaceInit();
#endif /* INCLUDE_VXBUS */
@ -613,15 +579,12 @@ void sysHwInit (void)
strncpy(sysBootLine, DEFAULT_BOOT_LINE, strlen(DEFAULT_BOOT_LINE) + 1);
#endif /* FORCE_DEFAULT_BOOT_LINE */
#ifdef _WRS_CONFIG_SMP
_vxb_delayRtn = (void (*)())sysDelay;
_vxb_msDelayRtn = (void (*)(int))sysMsDelay;
_vxb_usDelayRtn = (void (*)(int))sysUsDelay;
armGenGetFreq();
#endif /*_WRS_CONFIG_SMP*/
}
/*******************************************************************************
@ -636,13 +599,11 @@ void sysHwInit (void)
*
* ERRNO
*/
void sysHwInit2(void)
{
static BOOL initialised = FALSE;
if (initialised)
{
if (initialised) {
return;
}
@ -654,18 +615,15 @@ void sysHwInit2 (void)
sysSerialConnectAll();
#endif /* INCLUDE_SIO_UTILS */
taskSpawn("tDevConn", 11, 0, 10000,
vxbDevConnect, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9);
taskSpawn("tDevConn", 11, 0, 10000, vxbDevConnect, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9);
#endif /* INCLUDE_VXBUS */
initialised = TRUE;
#if defined(INCLUDE_IPFTPS)
ipcom_sysvar_set("ipftps.root", TFFS_FLASH_MOUNT_POINTOT, IPCOM_SYSVAR_FLAG_OVERWRITE);
ipcom_sysvar_set("ipftps.dir", TFFS_FLASH_MOUNT_POINTOT, IPCOM_SYSVAR_FLAG_OVERWRITE);
#endif
}
/*******************************************************************************
@ -695,11 +653,8 @@ char * sysPhysMemTop (void)
{
static char *physTop = NULL;
if (physTop == NULL)
{
if (physTop == NULL) {
physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
}
return physTop;
@ -732,7 +687,6 @@ char * sysMemTop (void)
return (memTop);
}
/*******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
@ -748,12 +702,9 @@ char * sysMemTop (void)
*/
/*Please refer to FT-1500A-4V1.5.pdf for GPIO general description.*/
STATUS sysToMonitor
(
int startType /* passed to ROM to tell it how to boot */
STATUS sysToMonitor(int startType /* passed to ROM to tell it how to boot */
)
{
ARM_SMC_REGS input = { 0 };
ARM_SMC_REGS output = { 0 };
@ -765,8 +716,8 @@ STATUS sysToMonitor
#endif /* _WRS_CONFIG_ARM_LPAE */
input.a0 = 0x84000009;
armSmcCall(&input, &output);
while(1)
{}
while (1) {
}
return OK; /* in case we ever continue from ROM monitor */
}
@ -794,14 +745,8 @@ extern void arm_int_enable();
IMPORT void excVBARSet(UINT32 adr);
LOCAL void sysCpuStart
(
void (*startFunc)(void),
UINT32 cpuNum
)
LOCAL void sysCpuStart(void (*startFunc)(void), UINT32 cpuNum)
{
/* sysMsDelay(cpuNum*100);*/
#ifdef INCLUDE_VFP
vfpEnable();
@ -822,13 +767,9 @@ LOCAL void sysCpuStart
if (cpuNum == VX_SMP_NUM_CPUS - 1)
uartf("sysCpuStart(). cpu to start : %d done! \r\n", cpuNum);
(*startFunc)();
}
/*******************************************************************************
*
* sysCpuEnable - enable a multi core CPU
@ -842,14 +783,8 @@ LOCAL void sysCpuStart
* \NOMANUAL
*/
STATUS sysCpuEnable
(
unsigned int cpuNum,
void (*startFunc) (void),
char *stackPtr
)
STATUS sysCpuEnable(unsigned int cpuNum, void (*startFunc)(void), char *stackPtr)
{
static INT32 sysCpuEnableFirst = 1;
/* Validate cpuNum */
@ -857,9 +792,7 @@ STATUS sysCpuEnable
if (cpuNum < 1 || cpuNum >= VX_SMP_NUM_CPUS)
return (ERROR);
if (sysCpuEnableFirst == 1)
{
if (sysCpuEnableFirst == 1) {
/*
* IPIs cannot be connected in sysToMonitor, because interrupt handlers
* cannot be installed in interrupt context.
@ -872,8 +805,7 @@ STATUS sysCpuEnable
* The INT_LVL_MPCORE_IPI08 is sent by core 0 to all the AP cores.
*/
vxIpiConnect (INT_LVL_MPCORE_IPI08, (IPI_HANDLER_FUNC)(sysToMonitor),
(void *)(APPCORE_REBOOT));
vxIpiConnect(INT_LVL_MPCORE_IPI08, (IPI_HANDLER_FUNC)(sysToMonitor), (void *)(APPCORE_REBOOT));
vxIpiEnable(INT_LVL_MPCORE_IPI08);
@ -883,8 +815,7 @@ STATUS sysCpuEnable
* to core0.
*/
vxIpiConnect (INT_LVL_MPCORE_RESET, (IPI_HANDLER_FUNC)(sysToMonitor),
(void *) &rebootVar);
vxIpiConnect(INT_LVL_MPCORE_RESET, (IPI_HANDLER_FUNC)(sysToMonitor), (void *)&rebootVar);
vxIpiEnable(INT_LVL_MPCORE_RESET);
@ -907,8 +838,7 @@ STATUS sysCpuEnable
/* Make sure data hits memory */
cacheFlush ((CACHE_TYPE)DATA_CACHE, (void *)sysMPCoreStartup,
(size_t)(sizeof (sysMPCoreStartup)));
cacheFlush((CACHE_TYPE)DATA_CACHE, (void *)sysMPCoreStartup, (size_t)(sizeof(sysMPCoreStartup)));
cachePipeFlush();
#if 0
@ -939,15 +869,12 @@ STATUS sysCpuEnable
if (vmTranslate(NULL, (VIRT_ADDR)sysCpuInit, &physAddr) == ERROR)
return ERROR;
input.a0 = 0x84000003;
input.a1 = cpuNum;
if(2 == input.a1)
{
if (2 == input.a1) {
input.a1 = 0x100; /* Core2's number is 0x100 */
}
if(3 == input.a1)
{
if (3 == input.a1) {
input.a1 = 0x101; /* Core3's number is 0x101 */
}
/*input.a2 = (UINT32)(physAddr >> 32);*/
@ -960,8 +887,6 @@ STATUS sysCpuEnable
#endif
/* wake up core from wfe using sev. */
}
#endif
@ -1021,15 +946,12 @@ int sysProcNumGet (void)
* SEE ALSO: sysProcNumGet()
*/
void sysProcNumSet
(
int procNum /* processor number */
void sysProcNumSet(int procNum /* processor number */
)
{
sysProcNum = procNum;
}
#ifdef INCLUDE_SIO_UTILS
/******************************************************************************
*
@ -1052,18 +974,13 @@ void sysProcNumSet
* \NOMANUAL
*/
SIO_CHAN * bspSerialChanGet
(
int channel /* serial channel */
SIO_CHAN *bspSerialChanGet(int channel /* serial channel */
)
{
return ((SIO_CHAN *)ERROR);
}
#endif /* INCLUDE_SIO_UTILS */
#ifdef DRV_PCIBUS_FT
LOCAL UCHAR sysPciExIntRoute[4] = { 60, 61, 62, 63 };
@ -1077,9 +994,7 @@ LOCAL UCHAR sysPciExIntRoute[4] = {60, 61, 62, 63};
* RETURNS: OK or ERROR
*/
STATUS sysPciExAutoconfigInclude
(
PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */
STATUS sysPciExAutoconfigInclude(PCI_SYSTEM *pSys, /* PCI_SYSTEM structure pointer */
PCI_LOC *pLoc, /* pointer to function in question */
UINT devVend /* deviceID/vendorID of device */
)
@ -1101,16 +1016,13 @@ STATUS sysPciExAutoconfigInclude
*/
UCHAR pci_int_log[32] = { 0 };
int pci_int_idx = 0;
UCHAR sysPciExAutoconfigIntrAssign
(
PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */
UCHAR sysPciExAutoconfigIntrAssign(PCI_SYSTEM *pSys, /* PCI_SYSTEM structure pointer */
PCI_LOC *pLoc, /* pointer to function in question */
UCHAR pin /* contents of PCI int pin register */
)
{
pci_int_log[pci_int_idx++] = pin;
if(pci_int_idx == 32)
{
if (pci_int_idx == 32) {
pci_int_idx = 0;
}
@ -1119,16 +1031,11 @@ UCHAR sysPciExAutoconfigIntrAssign
#endif /* DRV_PCIBUS_M85XX */
/* this is for multi cluster*/
#if defined(_WRS_CONFIG_SMP)
UINT32 cpuIndexMap[4] = { 0, 1, 0x100, 0x101 };
UINT32 vxCpuIdGetByIndex
(
UINT32 idx
)
UINT32 vxCpuIdGetByIndex(UINT32 idx)
{
if (idx >= VX_MAX_SMP_CPUS)
return (UINT32)-1;
@ -1163,10 +1070,7 @@ UCHAR sysPciInByte(ULONG address)
*(volatile UINT *)address = data;
}
extern int fioFormatV
(
FAST const char *fmt, /* format string */
extern int fioFormatV(FAST const char *fmt, /* format string */
va_list vaList, /* pointer to varargs list */
FUNCPTR outRoutine, /* handler for args as they're formatted */
int outarg /* argument to routine */
@ -1187,12 +1091,10 @@ static void charout(char cha)
/* is the transmitter ready to accept a character? */
while ((reg_val32 & FLG_UTXFF) != 0x00)
{
while ((reg_val32 & FLG_UTXFF) != 0x00) {
reg_val32 = *(volatile UINT32 *)(uart_tx_fifo_addr + UARTFR);
}
*(volatile UINT32 *)uart_tx_fifo_addr = cha;
}
@ -1209,9 +1111,7 @@ void stringout(char * str)
} while ((reg_val32 & FLG_UTXFE) == 0);
}
static int bufferPut
(
char *inbuf, /* pointer to source buffer */
static int bufferPut(char *inbuf, /* pointer to source buffer */
int length, /* number of bytes to copy */
char **outptr /* pointer to destination buffer */
)
@ -1226,12 +1126,13 @@ int uartf(const char * fmt, /* format string */
... /* optional arguments to format */
)
{
char charArray[128] = {0,};
char charArray[128] = {
0,
};
char *buffer = charArray;
va_list vaList; /* traverses argument list */
int nChars;
va_start(vaList, fmt);
nChars = fioFormatV(fmt, vaList, bufferPut, (int)&buffer);
va_end(vaList);
@ -1240,10 +1141,8 @@ int uartf(const char * fmt, /* format string */
stringout(charArray);
return (nChars);
}
/*******************************************************************************
*
* sysSdhcClkFreqGet - get sdhc freq
@ -1255,7 +1154,6 @@ int uartf(const char * fmt, /* format string */
LOCAL UINT32 sysSdhcClkFreqGet(void)
{
return 600000000;
}
@ -1282,4 +1180,3 @@ LOCAL void sysGmacAddrSet (UINT8* macAddr)
addr += 2;
return;
}

17
usrStubs.c
View File

@ -9,21 +9,24 @@
int usr_ipftps_authenticate_nopasswd(Ipftps_session *session, char *password)
{
printf("auth: it\r\n");
printf("ftp passthor\r\n");
return 0;
}
#endif
#if 0
#if defined(__DCC__)
void usrAppInit(void)
{
printf("appInited\r\n");
}
#endif
#if defined(__GNUC__)
#include "lfs/lfs.c"
#include "lfs/lfs_util.c"
#endif
int mw(unsigned long addr, unsigned int val)
{
volatile unsigned int long *ptr = (volatile unsigned long *)(addr);
*ptr = val;
return 0;
}

842
vxbFtSpi.c
View File

File diff suppressed because it is too large

9
vxbFtSpi.h
View File

@ -13,6 +13,8 @@
#define FT_SPI_NAME "ftSpi"
#define SPI_MAX_CS_NUM 4
#define FSPIM_DEFAULT_FRF 0
#define FSPIM_DEFAULT_CFS 0
/* structure holding the instance specific details */
typedef struct _ft_spi_drv_ctrl {
VXB_DEVICE_ID pDev;
@ -24,6 +26,13 @@ typedef struct _ft_spi_drv_ctrl {
int dataWidth;
int cs;
UINT32 length;
UINT32 tx_fifo_len;
UINT32 rx_fifo_len;
UINT32 tx_count;
UINT32 rx_count;
const UINT8* tx_buff;
UINT8* rx_buff;
BOOL en_test;
UINT32 spiDevNum;
UINT32 initPhase;
SEM_ID muxSem;

501
vxbLfsLib.c
View File

@ -1,3 +1,4 @@
/* vim: set ts=4 sw=4 et fdm=marker: */
#include <vxWorks.h>
#include <stdio.h>
#include <string.h>
@ -7,12 +8,508 @@
#include <taskLib.h>
#include <sysLib.h>
#include <tickLib.h>
#include <iosLib.h>
#include <hwif/vxbus/vxBus.h>
#include <hwif/vxbus/hwConf.h>
#include <hwif/vxbus/vxbPlbLib.h>
#include <hwif/util/hwMemLib.h>
#include <hwif/util/vxbParamSys.h>
#include <hwif/vxbus/vxbSpiLib.h>
#include "vxbSp25SpiFlash.h"
#include <../h/flash/vxbFlash.h>
#include <../h/flash/vxbFlashCommon.h>
#include <usrLib.h>
#if !defined(__DCC__)
#define LFS_THREADSAFE 1
#include "lfs/lfs.c"
#include "lfs/lfs_util.c"
#endif
typedef struct __lfs_drv_ctrl lfsDrvCtrl;
typedef struct lfs_ios_drv lfsIosDrv;
struct __lfs_file_descr {
union {
lfs_file_t file;
lfs_dir_t dir;
} u;
BOOL isDir;
lfsDrvCtrl *ctrl;
};
typedef struct __lfs_file_descr LFS_FILE_DESC;
struct lfs_ios_drv {
DEV_HDR devHdr;
lfsDrvCtrl *pDrvCtrl;
};
struct __lfs_drv_ctrl {
VXB_DEVICE_ID pDev;
/* per-driver info */
void *pDrvCtrl;
const char *mountPoint;
const char *flashDrvName;
int flashUnit;
UINT32 flashOffset;
UINT32 flashSize;
UINT32 pageSize;
UINT32 blkNum;
int lfsDrvNum;
lfsIosDrv lfsDrv;
FLASH_CHIP_ID mtd;
struct lfs_config lfsConfig;
SEM_ID lock;
lfs_t fsh;
};
/* {{{ lfsDevFuncs */
LOCAL void lfsDevInstInit(VXB_DEVICE_ID pDev)
{
lfsDrvCtrl *drv;
struct hcfDevice *pHcf;
drv = (lfsDrvCtrl *)hwMemAlloc(sizeof(*drv));
if (drv == NULL) {
return;
}
drv->pDrvCtrl = pDev;
pDev->pDrvCtrl = drv;
drv->mtd = NULL;
pHcf = (struct hcfDevice *)hcfDeviceGet(pDev);
if (pHcf == NULL) {
#ifndef _VXBUS_BASIC_HWMEMLIB
hwMemFree((char *)drv);
#endif /* _VXBUS_BASIC_HWMEMLIB */
pDev->pDrvCtrl = NULL;
return;
}
if (devResourceGet(pHcf, "flashName", HCF_RES_STRING, (void *)&drv->flashDrvName) != OK) {
goto err;
}
if (devResourceGet(pHcf, "flashUnit", HCF_RES_INT, (void *)&drv->flashUnit) != OK) {
drv->flashUnit = 0;
}
if (devResourceGet(pHcf, "flashOffset", HCF_RES_INT, (void *)&drv->flashOffset) != OK) {
drv->flashOffset = 0;
}
if (devResourceGet(pHcf, "flashSize", HCF_RES_INT, (void *)&drv->flashSize) != OK) {
drv->flashSize = 0;
}
if (devResourceGet(pHcf, "pageSize", HCF_RES_INT, (void *)&drv->pageSize) != OK) {
drv->pageSize = 256;
}
if (devResourceGet(pHcf, "mountPoint", HCF_RES_STRING, (void *)&drv->mountPoint) != OK) {
drv->mountPoint = "/lfs0";
}
vxbNextUnitGet(pDev);
return;
err:
#ifndef _VXBUS_BASIC_HWMEMLIB
hwMemFree((char *)drv);
#endif /* _VXBUS_BASIC_HWMEMLIB */
pDev->pDrvCtrl = NULL;
}
LOCAL void lfsDevInstInit2(VXB_DEVICE_ID pDev)
{
lfsDrvCtrl *pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
pDrvCtrl->lock = semBCreate(SEM_Q_FIFO, SEM_FULL);
}
/* {{{ lfs handler */
LOCAL LFS_FILE_DESC *lfsFuncOpen(lfsIosDrv *dev, const char *name, int flags, int mode)
{
int err;
LFS_FILE_DESC *ptr;
if (S_ISDIR(mode)) {
printf("is dir not support\r\n");
return (LFS_FILE_DESC *)(ERROR);
}
printf("mode: %x, flags: %x, name=%p, %c(%s)\r\n", mode, flags, name, name);
ptr = calloc(1, sizeof *ptr);
if (!ptr) {
goto end;
}
ptr->ctrl = dev->pDrvCtrl;
if (name == NULL || name[0] == '\0') {
err = lfs_dir_open(&ptr->ctrl->fsh, &ptr->u.dir, ".");
printf("dir_open: %d\r\n", err);
if (err != LFS_ERR_OK) {
free(ptr);
goto end;
}
printf("open: %p\r\n", ptr);
ptr->isDir = 1;
return ptr;
}
printf("open: %s\r\n", name);
if (lfs_file_open(&ptr->ctrl->fsh, &ptr->u.file, name, LFS_O_RDWR) == LFS_ERR_OK) {
return ptr;
} else {
free(ptr);
}
end:
return (LFS_FILE_DESC *)(ERROR);
}
LOCAL int lfsFuncClose(LFS_FILE_DESC *pfd)
{
lfsDrvCtrl *pDrvCtrl = pfd->ctrl;
printf("close: %p\r\n", pfd);
if (pfd->isDir) {
lfs_dir_close(&pDrvCtrl->fsh, &pfd->u.dir);
} else {
lfs_file_close(&pDrvCtrl->fsh, &pfd->u.file);
}
free(pfd);
return OK;
}
LOCAL int lfsFuncIoctl(LFS_FILE_DESC *pfd, int cmd, _Vx_ioctl_arg_t arg)
{
struct stat *stbuf;
lfsDrvCtrl *pDrvCtrl = pfd->ctrl;
printf("ioctl: %d\r\n", cmd);
switch (cmd) {
case FIOFSTATGET:
stbuf = (struct stat *)(arg);
stbuf->st_dev = (u_long)&pDrvCtrl->lfsDrv.devHdr;
stbuf->st_nlink = 1;
stbuf->st_attrib = 0;
if (pfd->isDir) {
stbuf->st_mode = S_IRWXU | S_IRWXG | S_IRWXO | S_IFDIR;
stbuf->st_size = pDrvCtrl->pageSize;
stbuf->st_blocks = 1;
break;
}
}
return (OK);
}
LOCAL ssize_t lfsFuncRead(LFS_FILE_DESC *pfd, char *buffer, size_t maxbytes)
{
lfsDrvCtrl *pDrvCtrl = pfd->ctrl;
printf("read: %p\r\n", pfd);
if (pfd->isDir) {
printf("read dir\r\n");
return 0;
}
return lfs_file_read(&pDrvCtrl->fsh, &pfd->u.file, buffer, maxbytes);
}
LOCAL ssize_t lfsFuncWrite(LFS_FILE_DESC *pfd, char *buffer, size_t nbytes)
{
lfsDrvCtrl *pDrvCtrl = pfd->ctrl;
printf("write: %p\r\n", pfd);
if (pfd->isDir) {
printf("write dir\r\n");
return 0;
}
return lfs_file_write(&pDrvCtrl->fsh, &pfd->u.file, buffer, nbytes);
}
LOCAL STATUS lfsFuncRemove(LFS_FILE_DESC *pfd, char *pPath)
{
lfsDrvCtrl *pDrvCtrl = pfd->ctrl;
printf("remove: %s\r\n", pPath);
lfs_remove(&pDrvCtrl->fsh, pPath);
return OK;
}
/* }}} */
/* {{{ lfs flash operations */
LOCAL int lfsFlashRead(const struct lfs_config *cfg, lfs_block_t block, lfs_off_t off, void *buffer, lfs_size_t size)
{
UINT32 pos;
lfsDrvCtrl *pDrvCtrl = cfg->context;
UINT8 *buffers[2] = {buffer, NULL};
pos = pDrvCtrl->flashOffset + block * cfg->block_size + off;
printf("%s: block: %lu, off: %lu, size: %lu, pos: 0x%lx\n", __FUNCTION__, block, off, size, pos);
if (pDrvCtrl->mtd->flashOPs.read(pDrvCtrl->mtd, pos, 1, size, buffers, NULL) == OK) {
return LFS_ERR_OK;
}
return LFS_ERR_IO;
}
LOCAL int lfsFlashProg(const struct lfs_config *cfg, lfs_block_t block, lfs_off_t off, const void *buffer,
lfs_size_t size)
{
STATUS r;
UINT32 pos;
lfsDrvCtrl *pDrvCtrl = cfg->context;
UINT8 *buffers[2] = {(void *)buffer, NULL};
pos = pDrvCtrl->flashOffset + block * cfg->block_size + off;
printf("%s: block: %lu, off: %lu, size: %lu, pos: 0x%lx\n", __FUNCTION__, block, off, size, pos);
r = pDrvCtrl->mtd->flashOPs.write(pDrvCtrl->mtd, pos, 1, size, buffers, NULL);
printf("prog done: %d\r\n", r);
return r == OK ? LFS_ERR_OK : LFS_ERR_IO;
}
LOCAL int lfsFlashErase(const struct lfs_config *cfg, lfs_block_t block)
{
UINT32 pos;
lfsDrvCtrl *pDrvCtrl = cfg->context;
printf("%s: block: %lu\n", __FUNCTION__, block);
pos = pDrvCtrl->flashOffset + block * cfg->block_size;
if (pDrvCtrl->mtd->flashOPs.blkErase(pDrvCtrl->mtd, pos, 1) == OK) {
return LFS_ERR_OK;
}
return LFS_ERR_IO;
}
LOCAL int lfsFlashSync(const struct lfs_config *c)
{
return LFS_ERR_OK;
}
#ifdef LFS_THREADSAFE
LOCAL int lfsFlashLock(const struct lfs_config *cfg)
{
lfsDrvCtrl *pDrvCtrl = cfg->context;
semTake(pDrvCtrl->lock, WAIT_FOREVER);
return LFS_ERR_OK;
}
LOCAL int lfsFlashUnlock(const struct lfs_config *cfg)
{
lfsDrvCtrl *pDrvCtrl = cfg->context;
semGive(pDrvCtrl->lock);
return LFS_ERR_OK;
}
#endif
LOCAL void lfsCfgInit(lfsDrvCtrl *drv, FLASH_CHIP_ID flash)
{
int buffer_size = flash->uPageSize > 0 ? flash->uPageSize : drv->pageSize;
memset(&drv->lfsConfig, 0, sizeof drv->lfsConfig);
drv->lfsConfig.context = drv;
drv->lfsConfig.read = lfsFlashRead;
drv->lfsConfig.prog = lfsFlashProg;
drv->lfsConfig.erase = lfsFlashErase;
drv->lfsConfig.sync = lfsFlashSync;
drv->lfsConfig.read_size = buffer_size;
drv->lfsConfig.prog_size = buffer_size;
drv->lfsConfig.block_size = flash->uEraseSize;
drv->lfsConfig.block_count = drv->blkNum;
drv->lfsConfig.cache_size = buffer_size;
drv->lfsConfig.lookahead_size = flash->uEraseSize / 8;
drv->lfsConfig.block_cycles = 100;
#ifdef LFS_THREADSAFE
drv->lfsConfig.lock = lfsFlashLock;
drv->lfsConfig.unlock = lfsFlashUnlock;
#endif
}
/* }}} */
LOCAL void lfsDevInstConnect(VXB_DEVICE_ID pDev)
{
lfsDrvCtrl *pDrvCtrl;
VXB_DEVICE_ID pFlashDev;
FLASH_CHIP_ID (*flashChipInfoGet)(VXB_DEVICE_ID pDev, UINT32 chipId);
pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
pFlashDev = vxbInstByNameFind((char *)pDrvCtrl->flashDrvName, pDrvCtrl->flashUnit);
if (!pFlashDev) {
return;
}
semTake(pDrvCtrl->lock, WAIT_FOREVER);
flashChipInfoGet = (void *)vxbDevMethodGet(pFlashDev, DEVMETHOD_CALL(vxbFlashChipInfoGet));
pDrvCtrl->mtd = flashChipInfoGet(pFlashDev, 0);
if (pDrvCtrl->mtd) {
if (pDrvCtrl->flashSize <= 0) {
pDrvCtrl->flashSize = pDrvCtrl->mtd->uChipSize - pDrvCtrl->flashOffset;
}
pDrvCtrl->blkNum = pDrvCtrl->flashSize / pDrvCtrl->mtd->uEraseSize;
/* clang-format off */
pDrvCtrl->lfsDrvNum = iosDrvInstall(
(DRV_CREATE_PTR) lfsFuncOpen,
(DRV_REMOVE_PTR) lfsFuncRemove,
(DRV_OPEN_PTR) lfsFuncOpen,
(DRV_CLOSE_PTR) lfsFuncClose,
(DRV_READ_PTR) lfsFuncRead,
(DRV_WRITE_PTR) lfsFuncWrite,
(DRV_IOCTL_PTR) lfsFuncIoctl
);
/* clang-format on */
if (pDrvCtrl->lfsDrvNum > 0) {
if (iosDevAdd(&pDrvCtrl->lfsDrv.devHdr, pDrvCtrl->mountPoint, pDrvCtrl->lfsDrvNum) == OK) {
pDrvCtrl->lfsDrv.pDrvCtrl = pDrvCtrl;
lfsCfgInit(pDrvCtrl, pDrvCtrl->mtd);
} else {
pDrvCtrl->mtd = NULL;
}
} else {
pDrvCtrl->mtd = NULL;
}
}
semGive(pDrvCtrl->lock);
if (pDrvCtrl->mtd)
lfs_mount(&pDrvCtrl->fsh, &pDrvCtrl->lfsConfig);
}
LOCAL struct drvBusFuncs lfsDevFuncs = {
lfsDevInstInit, /* devInstanceInit */
lfsDevInstInit2, /* devInstanceInit2 */
lfsDevInstConnect /* devConnect */
};
/* }}} */
/* {{{ lfsMethods */
LOCAL void lfsDevShow(VXB_DEVICE_ID pDev, int verbose)
{
lfsDrvCtrl *pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
printf(" %s unit %d on %s @ 0x%08x", pDev->pName, pDev->unitNumber, vxbBusTypeString(pDev->busID), pDev);
printf(" with busInfo %p\n", pDev->u.pSubordinateBus);
if (verbose) {
printf(" mountPoint: %s\n", pDrvCtrl->mountPoint);
printf(" flashName: %s\n", pDrvCtrl->flashDrvName);
printf(" mtd: %p\n", pDrvCtrl->mtd);
printf(" read_size: %d\n", pDrvCtrl->lfsConfig.read_size);
printf(" prog_size: %d\n", pDrvCtrl->lfsConfig.prog_size);
printf(" block_size: %d\n", pDrvCtrl->lfsConfig.block_size);
if (pDrvCtrl->mtd) {
printf(" flashChip: %s\n", pDrvCtrl->mtd->chipName);
}
}
}
LOCAL STATUS lfsDevInstUnlink(VXB_DEVICE_ID pDev, void *unused)
{
lfsDrvCtrl *pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
/* Check for vaild parameter */
VXB_ASSERT_NONNULL_V(pDev);
#ifndef _VXBUS_BASIC_HWMEMLIB
hwMemFree((char *)pDrvCtrl);
#endif /* _VXBUS_BASIC_HWMEMLIB */
pDev->pDrvCtrl = NULL;
return OK;
}
/* }}} */
/* Publish the methods for the resources controlled with this file */
/* clang-format off */
LOCAL struct vxbDeviceMethod lfsDevMethods[] = {
DEVMETHOD(busDevShow , lfsDevShow),
DEVMETHOD(vxbDrvUnlink, lfsDevInstUnlink),
{ 0, 0 }
};
LOCAL struct vxbSpiRegister lfsDevDriver = {
{
NULL, /* pNext */
VXB_DEVID_DEVICE, /* devID */
VXB_BUSID_PLB, /* busID */
VXBUS_VERSION_5, /* vxbVersion */
"lfs", /* drvName */
&lfsDevFuncs, /* pDrvBusFuncs */
lfsDevMethods, /* pMethods */
NULL, /* devProbe */
NULL, /* pParamDefaults */
},
};
/* clang-format on */
void lfsDevRegister(void)
{
(void)vxbDevRegister((struct vxbDevRegInfo *)&lfsDevDriver);
}
STATUS lfsFormat(int unit)
{
VXB_DEVICE_ID pDev;
lfsDrvCtrl *pDrvCtrl;
pDev = vxbInstByNameFind("lfs", unit);
if (pDev == NULL) {
printf("Can't find lfs%d\n", unit);
return ERROR;
}
pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
if (!pDrvCtrl->mtd) {
printf("mtd is null\n");
return ERROR;
}
return lfs_format(&pDrvCtrl->fsh, &pDrvCtrl->lfsConfig);
}
STATUS lfsMount(int unit)
{
VXB_DEVICE_ID pDev;
lfsDrvCtrl *pDrvCtrl;
pDev = vxbInstByNameFind("lfs", unit);
if (pDev == NULL) {
printf("Can't find lfs%d\n", unit);
return ERROR;
}
pDrvCtrl = (lfsDrvCtrl *)pDev->pDrvCtrl;
if (!pDrvCtrl->mtd) {
printf("mtd is null\n");
return ERROR;
}
return lfs_mount(&pDrvCtrl->fsh, &pDrvCtrl->lfsConfig);
}

178
vxbSm2130SpiDev.c
View File

@ -1,3 +1,4 @@
/* vim: set ts=4 sw=4 et fdm=marker: */
#include <vxWorks.h>
#include <stdio.h>
#include <string.h>
@ -7,6 +8,9 @@
#include <taskLib.h>
#include <sysLib.h>
#include <tickLib.h>
#include <iosLib.h>
#include <selectLib.h>
#include <errnoLib.h>
#include <hwif/vxbus/vxBus.h>
#include <hwif/vxbus/hwConf.h>
#include <hwif/vxbus/vxbPlbLib.h>
@ -17,10 +21,20 @@
#include "vxbSm2130SpiDev.h"
#include <usrLib.h>
#define SPI_DEV_MUTEX_OPT (SEM_Q_PRIORITY | SEM_DELETE_SAFE | SEM_INVERSION_SAFE)
typedef struct _Sm2310_DEV_HANDLE {
DEV_HDR devHdr;
SEL_WAKEUP_LIST selList;
SM2130_SPI_DEV *pDevCtrl;
} SM2310_DEV_HANDLE;
/* locals */
LOCAL void sm2130SpiDevShow(VXB_DEVICE_ID pDev, int verbose);
LOCAL INT32 spiDevRead(VXB_DEVICE_ID pDev, UINT8 cmd);
LOCAL STATUS spiDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var);
LOCAL INT32 sm2130BusDevRead(VXB_DEVICE_ID pDev, UINT8 cmd);
LOCAL STATUS sm2130BusDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var);
/* VxBus methods */
LOCAL void sm2130SpiDevInstInit(VXB_DEVICE_ID pDev);
@ -37,7 +51,7 @@ LOCAL struct drvBusFuncs sm2130SpiDevFuncs = {
};
/* Publish the methods for the resources controlled with this file */
/* clang-format off */
LOCAL struct vxbDeviceMethod sm2130SpiDevMethods[] = {
DEVMETHOD(busDevShow , sm2130SpiDevShow),
DEVMETHOD(vxbDrvUnlink, sm2130SpiDevInstUnlink),
@ -53,10 +67,12 @@ LOCAL struct vxbSpiRegister sm2130SpiDevRegister = {
SPI_DEV_SM2130, /* drvName */
&sm2130SpiDevFuncs, /* pDrvBusFuncs */
sm2130SpiDevMethods, /* pMethods */
NULL, //sm2130Probe, /* devProbe */
NULL, /* devProbe */
NULL, /* pParamDefaults */
},
};
/* clang-format on */
/*
*
* vxbSm2130SpiDevRegister - register with the VxBus subsystem
@ -85,6 +101,7 @@ void vxbSm2130SpiDevRegister(void)
LOCAL void sm2130SpiDevInstInit(VXB_DEVICE_ID pDev)
{
SM2130_SPI_DEV *pDrvCtrl;
struct hcfDevice *pHcf;
/* Check for vaild parameter */
VXB_ASSERT_NONNULL_V(pDev);
@ -97,8 +114,18 @@ LOCAL void sm2130SpiDevInstInit(VXB_DEVICE_ID pDev)
pDrvCtrl->pDev = pDev;
pDev->pDrvCtrl = pDrvCtrl;
pDrvCtrl->read = spiDevRead;
pDrvCtrl->write = spiDevWrite;
pDrvCtrl->drvNode = -1;
pDrvCtrl->devHandle = NULL;
pDrvCtrl->devName = SM2310_DEV_NAME;
pHcf = (struct hcfDevice *)hcfDeviceGet(pDev);
if (pHcf) {
if (devResourceGet(pHcf, "devName", HCF_RES_STRING, (void *)&pDrvCtrl->devName) != OK) {
pDrvCtrl->devName = SM2310_DEV_NAME;
}
}
pDrvCtrl->read = sm2130BusDevRead;
pDrvCtrl->write = sm2130BusDevWrite;
vxbNextUnitGet(pDev);
}
@ -125,14 +152,75 @@ LOCAL void sm2130SpiDevInstInit2(VXB_DEVICE_ID pDev)
/* Mutex semaphore is initialized and necessary at this point */
pDrvCtrl->muteSem = semMCreate(SPI_DEV_MUTEX_OPT);
pFunc = vxbDevMethodGet(vxbDevParent(pDev),
(VXB_METHOD_ID)vxbSpiSpecialGet_desc);
pFunc = vxbDevMethodGet(vxbDevParent(pDev), (VXB_METHOD_ID)vxbSpiSpecialGet_desc);
/* Retrieve the SPI master special information */
if (pFunc != NULL)
(*pFunc)(vxbDevParent(pDev), &pDrvCtrl->specialInfo);
}
/* {{{ device driver api */
LOCAL SM2310_DEV_HANDLE *drv1553bOpen(SM2310_DEV_HANDLE *dev, const char *name, int flags, int mode)
{
SM2130_SPI_DEV *pDrvCtrl = dev->pDevCtrl;
(void)semTake(pDrvCtrl->muteSem, WAIT_FOREVER);
++pDrvCtrl->refcount;
(void)semGive(pDrvCtrl->muteSem);
printf("open: %p\n", dev);
return dev;
}
LOCAL int drv1553bClose(SM2310_DEV_HANDLE *dev)
{
SM2130_SPI_DEV *pDrvCtrl = dev->pDevCtrl;
(void)semTake(pDrvCtrl->muteSem, WAIT_FOREVER);
--pDrvCtrl->refcount;
(void)semGive(pDrvCtrl->muteSem);
printf("close: %p\n", dev);
return (OK);
}
LOCAL int drv1553bIoctl(SM2310_DEV_HANDLE *dev, int cmd, _Vx_ioctl_arg_t arg)
{
SM2130_XFER *xfer;
SM2130_SPI_DEV *pDrvCtrl = dev->pDevCtrl;
STATUS ret = OK;
printf("ioctl: %p\n", dev);
(void)semTake(pDrvCtrl->muteSem, WAIT_FOREVER);
switch (cmd) {
case FIOSELECT:
ret = selNodeAdd(&dev->selList, (SEL_WAKEUP_NODE *)arg);
break;
case FIOUNSELECT:
ret = selNodeDelete(&dev->selList, (SEL_WAKEUP_NODE *)arg);
break;
case FIO_XFER:
xfer = (SM2130_XFER *)(arg);
switch (xfer->type) {
case FIO_XFER_TX:
pDrvCtrl->write(pDrvCtrl->pDev, xfer->reg, xfer->val);
break;
case FIO_XFER_RX:
xfer->val = pDrvCtrl->read(pDrvCtrl->pDev, xfer->reg);
break;
default:
errnoSet(EINVAL);
ret = ERROR;
}
break;
default:
break;
}
(void)semGive(pDrvCtrl->muteSem);
return (ret);
}
/* }}} */
/*
* sm2130SpiDevInstConnect - third level initialization routine of spi flash
*
@ -146,11 +234,41 @@ LOCAL void sm2130SpiDevInstInit2(VXB_DEVICE_ID pDev)
LOCAL void sm2130SpiDevInstConnect(VXB_DEVICE_ID pDev)
{
SM2130_SPI_DEV *pDrvCtrl;
SM2310_DEV_HANDLE *dev;
/* Check for vaild parameter */
VXB_ASSERT_NONNULL_V(pDev);
pDrvCtrl = (SM2130_SPI_DEV *)pDev->pDrvCtrl;
(void)semTake(pDrvCtrl->muteSem, WAIT_FOREVER);
if (pDrvCtrl->drvNode < 0) {
/* clang-format off */
pDrvCtrl->drvNode = iosDrvInstall(
(DRV_CREATE_PTR)drv1553bOpen ,
(DRV_REMOVE_PTR)NULL ,
(DRV_OPEN_PTR)drv1553bOpen ,
(DRV_CLOSE_PTR)drv1553bClose ,
(DRV_READ_PTR)NULL ,
(DRV_WRITE_PTR)NULL ,
(DRV_IOCTL_PTR)drv1553bIoctl);
/* clang-format on */
if (pDrvCtrl->drvNode > 0) {
dev = (SM2310_DEV_HANDLE *)hwMemAlloc(sizeof(SM2310_DEV_HANDLE));
if (dev) {
pDrvCtrl->refcount = 0;
selWakeupListInit(&dev->selList);
if (iosDevAdd(&dev->devHdr, pDrvCtrl->devName, pDrvCtrl->drvNode) == OK) {
pDrvCtrl->devHandle = dev;
dev->pDevCtrl = pDrvCtrl;
} else {
#ifndef _VXBUS_BASIC_HWMEMLIB
hwMemFree((char *)dev);
#endif /* _VXBUS_BASIC_HWMEMLIB */
}
}
}
}
(void)semGive(pDrvCtrl->muteSem);
}
/*
@ -198,19 +316,26 @@ LOCAL STATUS sm2130SpiDevInstUnlink(VXB_DEVICE_ID pDev, void *unused)
*/
LOCAL void sm2130SpiDevShow(VXB_DEVICE_ID pDev, int verbose)
{
printf(" %s unit %d on %s @ 0x%08x", pDev->pName, pDev->unitNumber,
vxbBusTypeString(pDev->busID), pDev);
SM2130_SPI_DEV *pDrvCtrl = (SM2130_SPI_DEV *)pDev->pDrvCtrl;
printf(" %s unit %d on %s @ 0x%08x", pDev->pName, pDev->unitNumber, vxbBusTypeString(pDev->busID), pDev);
printf(" with busInfo %p\n", pDev->u.pSubordinateBus);
if (verbose) {
printf(" chipSelect: %d\n", pDrvCtrl->cs);
printf(" mode: %d\n", pDrvCtrl->mode);
printf(" speed: %u\n", pDrvCtrl->freq);
printf(" devName: %s\n", pDrvCtrl->devName);
printf(" devHandle: %p\n", pDrvCtrl->devHandle);
printf(" drvNode: %d\n", pDrvCtrl->drvNode);
printf(" refCount: %d\n", pDrvCtrl->refcount);
}
return;
}
/*
* spiDevWrite - VxBus SPI device write by name support routine
* sm2130BusDevWrite - VxBus SPI device write by name support routine
*
* This routine firstly finds the VXB_DEVICE_ID for a given instance
* identified by name and unit number, then call vxbI2cDevWrite() routine to
@ -220,12 +345,12 @@ LOCAL void sm2130SpiDevShow(VXB_DEVICE_ID pDev, int verbose)
*
* ERRNO : N/A
*/
LOCAL STATUS spiDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var)
LOCAL STATUS sm2130BusDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var)
{
SPI_TRANSFER transInfo = { NULL, NULL, 0, 0, 0 };
UINT8 buf[3];
/* Check if the pDev pointer is valid */
/* Check if the pDev pointer is valid */
VXB_ASSERT(pDev != NULL, ERROR)
buf[0] = cmd;
buf[1] = var & 0xff;
@ -234,11 +359,11 @@ LOCAL STATUS spiDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var)
transInfo.txBuf = buf;
transInfo.txLen = 3;
return (vxbSpiTransfer(pDev, &transInfo));
return vxbSpiTransfer(pDev, &transInfo);
}
/*
* spiDevRead - read register routine
* sm2130BusDevRead - read register routine
*
* This is the SPI flash status /config register read out routine.
*
@ -246,27 +371,31 @@ LOCAL STATUS spiDevWrite(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var)
*
* ERRNO: N/A
*/
LOCAL INT32 spiDevRead(VXB_DEVICE_ID pDev, UINT8 cmd)
LOCAL INT32 sm2130BusDevRead(VXB_DEVICE_ID pDev, UINT8 cmd)
{
SPI_TRANSFER transInfo = { NULL, NULL, 0, 0, 0 };
UINT16 buffer = 0xffff;
UINT16 buffer;
UINT8 buf[3] = { 0xff, 0xff, 0xff };
/* check if the pDev pointer is valid */
VXB_ASSERT(pDev != NULL, ERROR)
transInfo.txBuf = &cmd;
buf[0] = cmd;
transInfo.txBuf = buf;
transInfo.txLen = 1;
transInfo.rxBuf = (UINT8 *)&buffer;
transInfo.rxLen = 2;
transInfo.rxBuf = buf;
transInfo.rxLen = 3;
if (vxbSpiTransfer(pDev, &transInfo) != OK)
return ERROR;
else
buffer = (buf[2] << 8) | buf[1];
return (buffer);
}
/* {{{ Test Read write */
INT32 sm2130Read(UINT8 cmd)
{
VXB_DEVICE_ID pDev;
@ -300,3 +429,4 @@ STATUS sm2130Write(UINT8 cmd, UINT16 var)
return pCtrl->write(pDev, cmd, var);
}
/* }}} */

22
vxbSm2130SpiDev.h
View File

@ -3,8 +3,19 @@
#define SPI_DEV_SM2130 "SM2130"
#define SPI_DEV_MUTEX_OPT \
(SEM_Q_PRIORITY | SEM_DELETE_SAFE | SEM_INVERSION_SAFE)
#define SM2310_DEV_NAME "/sm2130"
#define FIO_XFER_TX (1)
#define FIO_XFER_RX (2)
#define FIO_XFER (200)
struct sm2130_xfer {
UINT8 type;
UINT8 reg;
UINT16 val;
};
typedef struct sm2130_xfer SM2130_XFER;
typedef struct _spi_1553b_drv_ctrl {
VXB_DEVICE_ID pDev;
@ -13,6 +24,13 @@ typedef struct _spi_1553b_drv_ctrl {
int mode;
unsigned int freq;
const char *devName;
int refcount;
int drvNode;
void *devHandle;
INT32 (*read)(VXB_DEVICE_ID pDev, UINT8 cmd);
STATUS (*write)(VXB_DEVICE_ID pDev, UINT8 cmd, UINT16 var);

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