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enable ftp & telnet 

Signed-off-by: surenyi <surenyi82@163.com>
master
surenyi 3 weeks ago
parent
4043fa882d
commit
ac90dbe0a2
10 changed files with 99 additions and 53 deletions
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  1. 4
      20bsp.cdf
  2. 2
      Makefile
  3. 42
      config.h
  4. 17
      hwconf.c
  5. 45
      sysLib.c
  6. 21
      usrStubs.c
  7. 3
      vxbAhciStorage.c
  8. 1
      vxbFtI2c.c
  9. 3
      vxbFtPcie.c
  10. 14
      vxbSp25SpiFlash.c

4
20bsp.cdf
View File

@ -16,7 +16,9 @@ Bsp ft20004_km02 {
MP_OPTIONS SMP
REQUIRES INCLUDE_KERNEL \
DRV_ARM_GEN_SYS_TIMER \
DRV_ARM_GICV3
DRV_ARM_GICV3 \
INCLUDE_IPFTPS \
INCLUDE_IPTELNETS
}

2
Makefile
View File

@ -22,7 +22,7 @@ RELEASE += bootrom_uncmp.hex
MACH_EXTRA += vxbArmGenIntCtlrV3.o vxbArmv7GenTimer.o vxbArmv7AuxTimer.o \
vxbFtPcie.o vxbAhciStorage.o vxbFtGmacEnd.o vxbFtcan.o vxbPci.o \
vxbFtSdCtrl.o vxbFtI2c.o vxbYt8521Phy.o genericPhy.o vxbFtQspi.o\
vxbSp25SpiFlash.o vxbFtGpio.o
vxbSp25SpiFlash.o vxbFtGpio.o usrStubs.o
ifneq ($(findstring bootrom,$(MAKECMDGOALS)),bootrom)
LIB_EXTRA = lib/libFtX100dcdrv.a

42
config.h
View File

@ -18,12 +18,12 @@ extern "C" {
/* BSP version/revision identification, before configAll.h */
#define BSP_VERSION "1.0"
#define BSP_REV "/0" /* 0 for first revision */
#define BSP_REV ".0" /* 0 for first revision */
#include <vsbConfig.h>
#include <configAll.h>
#define SYS_MODEL "FT2000/4 BOARD"
#define SYS_MODEL "FT20004/KM02 BOARD"
#define INCLUDE_VXBUS
@ -38,16 +38,23 @@ extern "C" {
#undef DRV_ARM_GEN_AUX_TIMER
#define INCLUDE_SYSCLK_INIT
#define INCLUDE_PARAM_SYS
#define DRV_FTCAN
#define INCLUDE_FT_SD
#define DRV_FTI2C
#undef DRV_FTCAN
#undef INCLUDE_FT_SD
#undef DRV_FTI2C
#define DRV_FTQSPI
#define INCLUDE_SPI_BUS
#define DRV_SPIFLASH_SP25
#undef INCLUDE_YT8521PHY
#define INCLUDE_YT8521PHY
#define DRV_FTGPIO
#if defined(INCLUDE_PC_CONSOLE)||defined(INCLUDE_WINDML)
#define DRV_X100DC
#endif
/* ftpd */
/* #define INCLUDE_IPFTPS */
#define FTPS_AUTH_CALLBACK_HOOK usr_ipftps_authenticate_nopasswd
#define TFFS_FLASH_MOUNT_POINTOT "/tffs0"
/* ARM PrimeCell SIO for VxBus */
#define INCLUDE_SIO_UTILS
@ -60,7 +67,9 @@ extern "C" {
#define INCLUDE_USB_GEN2_STORAGE_INIT
#endif
#define INCLUDE_DRV_STORAGE_AHCI
#define INCLUDE_TFFS
#undef INCLUDE_DRV_STORAGE_AHCI
#if defined(INCLUDE_USB) || defined(INCLUDE_TFFS) || \
defined(INCLUDE_DRV_STORAGE_PIIX) || defined(INCLUDE_DRV_STORAGE_AHCI)
#define INCLUDE_DOSFS
@ -86,7 +95,7 @@ extern "C" {
/*#define INCLUDE_HRFS*/
#define DRV_VXBEND_FTGMAC
#define DRV_PCIBUS_FT
#undef DRV_PCIBUS_FT
#ifdef DRV_PCIBUS_FT
# define INCLUDE_PCI_BUS
@ -122,7 +131,7 @@ extern "C" {
#define INCLUDE_VXB_CMDLINE
#endif /* INCLUDE_VXBUS */
#define FORCE_DEFAULT_BOOT_LINE
#undef FORCE_DEFAULT_BOOT_LINE
#define DEFAULT_BOOT_LINE \
"gmac(0,0) host:/vxWorks " \
@ -149,7 +158,7 @@ extern "C" {
#define LOCAL_MEM_LOCAL_ADRS 0x80000000
#define LOCAL_MEM_BUS_ADRS 0x80000000
#define LOCAL_MEM_SIZE 0x70000000
#define LOCAL_MEM_SIZE 0x7ff00000
#define LOCAL_MEM_END_ADRS (LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE)
#define ROM_BASE_ADRS 0x40000000 /* base of NOR Flash/EPROM */
@ -169,10 +178,9 @@ extern "C" {
#define SPI_FLASH_PAGE_SIZE (0x100)
#define SPI_FLASH_BASE_ADRS 0
#define SPI_FLASH_SECTOR_NUM ((SPI_FLASH_SIZE) / (SPI_FLASH_SECTOR_SIZE))
#define SPI_BOOTROM_SIZE (0x500000)
#define INCLUDE_TFFS
#define SPI_BOOTROM_SIZE (0x400000)
#define SPI_KERNEL_SIZE (0x600000)
#ifdef INCLUDE_TFFS
# define INCLUDE_TFFS_MOUNT
# define INCLUDE_TFFS_SHOW
@ -190,10 +198,16 @@ extern "C" {
# define TFFS_PART0_FLASH_BASE_ADRS SPI_FLASH_BASE_ADRS
# define TFFS_PART0_FLASH_OFFSET 0
# define TFFS_PART0_FLASH_SIZE SPI_FLASH_SIZE
# define TFFS_PART0_FLASH_BOOT_SIZE SPI_BOOTROM_SIZE
# define TFFS_PART0_FLASH_BOOT_SIZE (SPI_BOOTROM_SIZE + SPI_KERNEL_SIZE)
#endif /* INCLUDE_TFFS */
/*
* -> sysTffsFormat 0 formating
* -> usrTffsConfig 0,0,"/tffs0" creating device
* -> devs show /tffs0
* -> dosFsVolFormat("/tffs0",0,0) formating to DOS
*/
/* clock rate configuration*/

17
hwconf.c
View File

@ -236,7 +236,7 @@ struct hcfResource qspiResources[] = {
{ "capacity", HCF_RES_INT, { (void *)(QSPI_FLASH_CAP_32MB) } },
{ "clkDiv", HCF_RES_INT, { (void *)(QSPI_SCK_DIV_128) } },
{ "transMode", HCF_RES_INT, { (void *)(QSPI_TRANSFER_1_1_1) } },
{ "addrMode", HCF_RES_INT, { (void *)(QSPI_ADDR_SEL_3) } },
{ "addrMode", HCF_RES_INT, { (void *)(QSPI_ADDR_SEL_4) } },
{ "spiDev", HCF_RES_ADDR, { (void *)&spiDevTbl[0]} },
{ "spiDevNum", HCF_RES_INT, { (void *)NELEMENTS(spiDevTbl)}},
@ -436,15 +436,6 @@ LOCAL struct hcfResource ftSdhc0Resources[] = {
};
#define ftSdhc0Num NELEMENTS(ftSdhc0Resources)
#ifdef INCLUDE_PC_CONSOLE
LOCAL const struct hcfResource pentiumM6845VgaResources[] =
{
{ "colorMode", HCF_RES_INT, {(void *) 1} },
{ "colorSetting",HCF_RES_INT, {(void *) 0x1f} },
};
#define pentiumM6845VgaNum NELEMENTS(pentiumM6845VgaResources)
#endif
#ifdef DRV_VXBEND_FTGMAC
#define PHYADDR_OF_GREEN_BOARD 4 /* for reference green board. hardware V1 */
@ -496,7 +487,7 @@ const struct hcfDevice hcfDeviceList[] = {
#ifdef DRV_VXBEND_FTGMAC
{ "gmac", 0, VXB_BUSID_PLB, 0, gmac0Num, gmac0Resources},
{ "gmac", 1, VXB_BUSID_PLB, 0, gmac1Num, gmac1Resources},
// { "gmac", 1, VXB_BUSID_PLB, 0, gmac1Num, gmac1Resources},
#endif
#ifdef DRV_ARM_GEN_SYS_TIMER
@ -522,10 +513,6 @@ const struct hcfDevice hcfDeviceList[] = {
{ "ftSdhci",0,VXB_BUSID_PLB, 0,ftSdhc0Num, ftSdhc0Resources },
#endif
#ifdef INCLUDE_PC_CONSOLE
{ "m6845Vga", 0, VXB_BUSID_PLB, 0, pentiumM6845VgaNum, pentiumM6845VgaResources },
#endif
#ifdef DRV_FTI2C
{ "ftI2c", 0, VXB_BUSID_PLB, 0, i2cDev0Num, i2cDev0Resources },
{ "ftI2c", 1, VXB_BUSID_PLB, 0, i2cDev1Num, i2cDev1Resources },

45
sysLib.c
View File

@ -13,7 +13,9 @@
#include <vxWorks.h>
#include <vsbConfig.h>
#include "config.h"
#if defined(INCLUDE_IPFTPS)
#include <ipcom_sysvar.h>
#endif
#define INCLUDE_MMU
@ -220,7 +222,7 @@ PHYS_MEM_DESC sysPhysMemDesc [] =
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
{
0x50000000, /* PCI io32Addr */
0x50000000,
@ -237,11 +239,20 @@ PHYS_MEM_DESC sysPhysMemDesc [] =
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
#ifdef DRV_FTQSPI
{ /* Qspi Flash */
{ /* Qspi BootRom */
SPI_FLASH_BASE_ADRS,
SPI_FLASH_BASE_ADRS,
SPI_FLASH_SIZE,
SPI_BOOTROM_SIZE,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RO | MMU_ATTR_DEVICE_SHARED
},
{ /* Qspi Flash */
SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE,
SPI_FLASH_BASE_ADRS + SPI_BOOTROM_SIZE,
SPI_FLASH_SIZE - SPI_BOOTROM_SIZE,
MMU_ATTR_VALID_MSK | MMU_ATTR_PROT_MSK | MMU_ATTR_DEVICE_SHARED_MSK,
MMU_ATTR_VALID | MMU_ATTR_SUP_RW | MMU_ATTR_DEVICE_SHARED
},
@ -555,27 +566,28 @@ extern void vxbNvmeStorageRegister (void);
#ifdef DRV_X100DC
extern void ftX100DcDevicePciRegister (void);
#endif
void sysHwInit (void)
{
uartf("...............................\r\n");
/*
swdo_swj_pad: can_rxd_1 i2c_2_scl
tdo_swj_pad: can_rxd_2 i2c_2_sda
CAN_1,CAN_2 and I2C_2, only choose ONE.
*/
writeq(readq(PIN_DEMUX_BASE+REG204)|CAN_TXD_0|CAN_RXD_0|CAN_TXD_1|CAN_RXD_1,
PIN_DEMUX_BASE+REG204); /* pad pin DeMux. enable CAN */
// writeq(readq(PIN_DEMUX_BASE+REG204)|CAN_TXD_0|CAN_RXD_0|CAN_TXD_1|CAN_RXD_1,
// PIN_DEMUX_BASE+REG204); /* pad pin DeMux. enable CAN */
#ifdef DRV_X100DC
ftX100DcDevicePciRegister();
#endif
sysMsDelay(100);
#ifdef INCLUDE_VXBUS
hardWareInterFaceInit();
#endif /* INCLUDE_VXBUS */
#ifdef DRV_PCIBUS_FT
ftPciRegister();
#endif
#endif
#ifdef INCLUDE_DRV_STORAGE_NVME
vxbNvmeStorageRegister ();
#endif
@ -611,7 +623,7 @@ void sysHwInit (void)
void sysHwInit2 (void)
{
static BOOL initialised = FALSE;
if (initialised)
{
return;
@ -631,7 +643,12 @@ void sysHwInit2 (void)
initialised = TRUE;
#if defined(INCLUDE_IPFTPS)
ipcom_sysvar_set("ipftps.root", TFFS_FLASH_MOUNT_POINTOT, IPCOM_SYSVAR_FLAG_OVERWRITE);
ipcom_sysvar_set("ipftps.dir", TFFS_FLASH_MOUNT_POINTOT, IPCOM_SYSVAR_FLAG_OVERWRITE);
#endif
}
/*******************************************************************************
@ -1143,7 +1160,7 @@ UINT32 uart_tx_fifo_addr = UART_1_BASE_ADR; /* FT UART BASE ADDR */
/* prime cell sio constants */
#define UARTFR 0x18 /* Flag register */
#define FLG_UTXFF (1 << 5) /* UART Tx FIFO Full */
#define FLG_UTXFE (1 << 7) /* UART Tx FIFO Empty */
static void charout(char cha)
{
volatile UINT32 reg_val32;
@ -1166,9 +1183,13 @@ void stringout(char * str)
{
char * pbuf = str;
char cha;
volatile UINT32 reg_val32;
while((cha = *pbuf++) != 0)
charout(cha);
do {
reg_val32 = *(volatile UINT32 *)(uart_tx_fifo_addr+UARTFR);
} while ((reg_val32 & FLG_UTXFE) == 0);
}
static int bufferPut

21
usrStubs.c
View File

@ -0,0 +1,21 @@
#include <vxWorks.h>
#include <vsbConfig.h>
#include "config.h"
#if defined(INCLUDE_IPFTPS)
#include <ipcom_sysvar.h>
#include <ipcom_sock.h>
#include <ipftps.h>
int usr_ipftps_authenticate_nopasswd(Ipftps_session *session, char *password)
{
printf("auth: it\r\n");
return 0;
}
#endif
void usrAppInit (void)
{
printf("appInited\r\n");
}

3
vxbAhciStorage.c
View File

@ -135,7 +135,7 @@ SEE ALSO:
IMPORT int usrAhciWatchdogValGet();
IMPORT int usrAhciSemTimoutValGet();
#if defined(INCLUDE_DRV_STORAGE_AHCI)
/* defines */
#ifdef AHCI_DEBUG
@ -3080,3 +3080,4 @@ LOCAL void ahciXferReq
sataXbdReqDone(pXbdReq, errCode);
return;
}
#endif

1
vxbFtI2c.c
View File

@ -14,6 +14,7 @@
#include <vxBusLib.h>
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <semLib.h>
#include <vxbTimerLib.h>
#include <hwif/util/hwMemLib.h>

3
vxbFtPcie.c
View File

@ -30,7 +30,7 @@
#include <../src/hwif/intCtlr/vxbIntDynaCtlrLib.h>
#include <spinLockLib.h>
#if defined(DRV_PCIBUS_FT)
/* debug */
#ifdef FT_DEBUG_ENABLE
@ -1421,3 +1421,4 @@ LOCAL STATUS ftPciMethodConvertBaseAddress
return (OK);
}
#endif

14
vxbSp25SpiFlash.c
View File

@ -180,7 +180,6 @@ SEE ALSO: vxBus, vxbSpiLib.c, sysTffs.c
/* defines */
#undef SPI_FLASH_DBG
#ifdef SPI_FLASH_DBG
#ifdef LOCAL
@ -189,7 +188,7 @@ SEE ALSO: vxBus, vxbSpiLib.c, sysTffs.c
#endif
IMPORT FUNCPTR _func_logMsg;
LOCAL int debugLevel = 10;
LOCAL int debugLevel = 100;
# define PRINTF_DEBUG
# ifdef PRINTF_DEBUG
@ -322,6 +321,8 @@ LOCAL const struct spiFlash_info spiFlashList[] =
/* CFI & JEDEC */
{ "sp25probe", 0, 0, 0, 0, 0, 0, 0},
/* KM02 use this flash */
{ "SM25QU256E", 0x20, 0x7019, 0, 256, 64 * 1024, 512, JEDECID_NO_EXT},
/* SPANSION S25FLXX serials */
@ -488,7 +489,6 @@ void vxbSp25SpiFlashRegister (void)
{
/* Need not check return status */
(void)vxbDevRegister ((struct vxbDevRegInfo *) &spS25SpiFlashRegister);
return;
}
@ -514,7 +514,6 @@ LOCAL void spS25SpiFlashInstInit
SPI_FLASH_DEV * pDrvCtrl;
/* Check for vaild parameter */
VXB_ASSERT_NONNULL_V (pDev);
pDrvCtrl = (SPI_FLASH_DEV *) hwMemAlloc (sizeof (SPI_FLASH_DEV));
@ -530,12 +529,10 @@ LOCAL void spS25SpiFlashInstInit
pDev->pDrvCtrl = pDrvCtrl;
/* save the name match result */
if ((pDrvCtrl->index = s25NameMatch (pDev)) == ERROR)
{
return;
}
/*
* paramDesc {
* The ppTime parameter specifies how many microseconds the SPI FLASH
@ -956,7 +953,7 @@ LOCAL STATUS spS25JedecProbe
pDrvCtrl = (SPI_FLASH_DEV *) pDev->pDrvCtrl;
SPI_FLASH_LOG (1000, "spS25JedecProbe(0x08%x) called\n",
SPI_FLASH_LOG (1000, "MyspS25JedecProbe(0x08%x) called\n",
(_Vx_usr_arg_t)pDev, 2, 3, 4, 5, 6);
memset (jedecId, 0, 5);
@ -1283,6 +1280,7 @@ LOCAL STATUS spS25spiFlashReset
* ERRNO: N/A
*/
LOCAL void spS25SpiFlashInstInit2
(
VXB_DEVICE_ID pDev
@ -1325,7 +1323,7 @@ LOCAL void spS25SpiFlashInstInit2
SPI_FLASH_LOG (1000, "JEDEC Probeing......Device ID: 0x%02x 0x%04x 0x%04x\r\n",
jedecId[0], (jedecId[1] << 8 | jedecId[2]),
(jedecId[3] << 8 | jedecId[4]), 4, 5, 6);
pDrvCtrl->flash.manuId = jedecId[0];
pDrvCtrl->flash.devId = (jedecId[1] << 8 | jedecId[2]);
pDrvCtrl->flash.extId = (jedecId[3] << 8 | jedecId[4]);

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