You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
64 lines
2.3 KiB
64 lines
2.3 KiB
3 months ago
|
/*
|
||
|
|
* Copyright : (C) 2022 Phytium Information Technology, Inc.
|
||
|
|
* All Rights Reserved.
|
||
|
|
*
|
||
|
|
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
|
||
|
|
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
|
||
|
|
* either version 1.0 of the License, or (at your option) any later version.
|
||
|
|
*
|
||
|
|
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
|
||
|
|
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||
|
|
* See the Phytium Public License for more details.
|
||
|
|
*
|
||
|
|
*
|
||
|
|
* FilePath: fmmu_table.c
|
||
|
|
* Date: 2023-11-6 10:33:28
|
||
|
|
* LastEditTime: 2023-11-6 10:33:28
|
||
|
|
* Description: This file is for
|
||
|
|
*
|
||
|
|
* Modify History:
|
||
|
|
* Ver Who Date Changes
|
||
|
|
* ----- ------ -------- --------------------------------------
|
||
|
|
* 1.0 zhangyan 2023/11/6 init commit
|
||
|
|
* 1.1 huanghe 2024/05/21 Unified aarch32 and aarch64 mmu tables
|
||
|
|
*/
|
||
|
|
#include "fmmu.h"
|
||
|
|
#include "ftypes.h"
|
||
|
|
#include "fparameters.h"
|
||
|
|
|
||
|
|
const struct ArmMmuRegion mmu_regions[] =
|
||
|
|
{
|
||
|
|
|
||
|
|
MMU_REGION_FLAT_ENTRY("DEVICE_REGION",
|
||
|
|
0x7000000, (512 * 1024 * 1024),
|
||
|
|
MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
|
||
|
|
MMU_REGION_FLAT_ENTRY("VIRT_GIC_DIST",
|
||
|
|
0x08000000, (0x000A0000 ),
|
||
|
|
MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
|
||
|
|
MMU_REGION_FLAT_ENTRY("VIRT_GIC_REDIST",
|
||
|
|
0x080A0000, (0x00F60000 ),
|
||
|
|
MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
|
||
|
|
// MMU_REGION_FLAT_ENTRY("PCIE_CONFIG_REGION",
|
||
|
|
// 0x40000000, 0x10000000,
|
||
|
|
// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
|
||
|
|
// MMU_REGION_FLAT_ENTRY("PCIE_CONFIG_REGION",
|
||
|
|
// 0x50000000, 0x30000000,
|
||
|
|
// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
|
||
|
|
// #ifdef __aarch64__
|
||
|
|
// MMU_REGION_FLAT_ENTRY("PCIE_MEM64_REGION",
|
||
|
|
// 0x1000000000, 0x1000000000,
|
||
|
|
// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
|
||
|
|
// #endif
|
||
|
|
};
|
||
|
|
|
||
|
|
const struct ArmMmuConfig mmu_config =
|
||
|
|
{
|
||
|
|
.num_regions = ARRAY_SIZE(mmu_regions),
|
||
|
|
.mmu_regions = mmu_regions,
|
||
|
|
};
|