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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fparameters.h
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-17 17:58:51
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* Description: This file is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#ifndef QEMU_VIRT_FPARAMETERS_H
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#define QEMU_VIRT_FPARAMETERS_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#if !defined(__ASSEMBLER__)
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#include "ftypes.h"
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#endif
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#define SOC_TARGET_QEMU_VIRT
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#define CORE0_AFF 0x0
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#define CORE1_AFF 0x1
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#define CORE2_AFF 0x2
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#define CORE3_AFF 0x3
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#define FCORE_NUM 4
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/* cache */
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#define CACHE_LINE_ADDR_MASK 0x3FUL
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#define CACHE_LINE 64U
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/* UART */
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#define FUART0_ID 0
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#define FUART_NUM 1
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#define FUART0_IRQ_NUM 33
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#define FUART0_BASE_ADDR 0x09000000
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#define FUART0_CLK_FREQ_HZ 100000000
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#define FT_STDOUT_BASE_ADDR FUART0_BASE_ADDR
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#define FT_STDIN_BASE_ADDR FUART0_BASE_ADDR
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/* GIC v3 */
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#define ARM_GIC_NR_IRQS 1024
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#define ARM_GIC_IRQ_START 0
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#define FGIC_NUM 1
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#define GICV3_BASE_ADDR 0x08000000
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#define GICV3_DISTRIBUTOR_BASE_ADDR (GICV3_BASE_ADDR + 0)
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#define GICV3_RD_BASE_ADDR (0x080A0000)
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#define GICV3_RD_OFFSET (2U << 16)
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#define GICV3_RD_SIZE (16U << 16)
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#define GICV3_ITS_BASE_ADDR 0x08080000
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/*
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* The maximum priority value that can be used in the GIC.
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*/
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#define GICV3_MAX_INTR_PRIO_VAL 240U
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#define GICV3_INTR_PRIO_MASK 0x000000f0U
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#define ARM_GIC_IPI_COUNT 16 /* MPCore IPI count */
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#define SGI_INT_MAX 16
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#define SPI_START_INT_NUM 32 /* SPI start at ID32 */
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#define PPI_START_INT_NUM 16 /* PPI start at ID16 */
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#define GIC_INT_MAX_NUM 1020 /* GIC max interrupts count */
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/* generic timer */
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/* non-secure physical timer int id */
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#define GENERIC_TIMER_NS_IRQ_NUM 30U
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/* virtual timer int id */
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#define GENERIC_VTIMER_IRQ_NUM 27U
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#define GENERIC_TIMER_ID0 0 /* non-secure physical timer */
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#define GENERIC_TIMER_ID1 1 /* virtual timer */
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#define GENERIC_TIMER_NUM 2
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/* PMU */
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#define FPMU_IRQ_NUM 23
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#ifdef __cplusplus
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}
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#endif
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#endif // !
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