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!138 Qspi 更新,Network更新

* update sdk 
Qspi 更新,Network更新
pull/139/head
刘治宏 7 months ago
committed by huanghe
parent
commit
169fd0f71e
  1. 2
      common/ftypes.h
  2. 42
      doc/ChangeLog.md
  3. 22
      doc/reference/sdk/flwip_port.md
  4. 21
      drivers/eth/fgmac/fgmac.c
  5. 8
      drivers/eth/fgmac/fgmac_hw.h
  6. 2
      drivers/eth/fxmac/fxmac.c
  7. 10
      drivers/eth/fxmac/fxmac_bdring.c
  8. 5
      drivers/eth/fxmac/fxmac_debug.c
  9. 1
      drivers/eth/fxmac/fxmac_phy.c
  10. 2
      drivers/mmc/fsdif/fsdif_dma.c
  11. 3
      drivers/mmc/fsdif/fsdif_intr.c
  12. 42
      drivers/qspi/fqspi/fqspi_flash.c
  13. 3
      example/network/lwip_iperf/src/lwip_timer.c
  14. 4
      example/network/lwip_jumbo/src/lwip_timer.c
  15. 4
      example/network/lwip_multicast/src/lwip_timer.c
  16. 4
      example/network/lwip_startup/src/lwip_timer.c
  17. 2
      example/network/raw_api/common/lwip_start.c
  18. 2
      example/peripherals/pwm/README.md
  19. 4
      third-party/lwip-2.1.2/ports/fgmac/fgmac_lwip_port.c
  20. 76
      third-party/lwip-2.1.2/ports/fxmac/ethernetif.c
  21. 65
      third-party/lwip-2.1.2/ports/lwip_port.c
  22. 2
      third-party/lwip-2.1.2/ports/lwip_port.h

2
common/ftypes.h

@ -81,6 +81,8 @@ typedef u32 tick_t;
#define _ALWAYS_INLINE inline __attribute__((always_inline))
#define _WEAK __attribute__((weak))
#define FUNUSED(x) ((void)x)
typedef void (*FIrqHandler)(void *InstancePtr);
typedef void (*FExceptionHandler)(void *InstancePtr);

42
doc/ChangeLog.md

@ -1,3 +1,45 @@
# Phytium Standalone SDK 2024-04-25 ChangeLog
Change Log since 2024-04-25
## third-party
- add default define of macro SEMAPHORE_MAXCOUNT,which solved problem that example wlan in freertos can not compile
# Phytium Standalone SDK 2024-04-25 ChangeLog
Change Log since 2024-04-22
## drivers
- modify some unused variable in xmac and sdif drivers
# Phytium Standalone SDK 2024-04-24 ChangeLog
Change Log since 2024-04-24
## drivers
- modify qspi driver
# Phytium Standalone SDK 2024-04-23 ChangeLog
Change Log since 2024-04-18
## drivers
- add api and macro to mask gmac mmc intr,which solved issue #86
- simplified the code of FXmacBdRingFromHwTx
## example
- delete LwipEthProcessLoop in all network examples,because gmac can not call this function
## third-party
- delete eth_poll in fxmac,the operations performed by eth_poll are merged into eth_input
- adjust lwip_port.c which support gmac and xmac well in rtos
# Phytium Standalone SDK 2024-04-22 ChangeLog
Change Log since 2024-04-22

22
doc/reference/sdk/flwip_port.md

@ -59,7 +59,6 @@ typedef struct
enum lwip_port_link_status (*eth_detect)(struct netif *netif);
void (*eth_deinit)(struct netif *netif);
void (*eth_start)(struct netif *netif);
void (*eth_poll)(struct netif *netif);
} LwipPortOps; /* lwip port 网卡注册函数*/
struct LwipPort {
@ -179,27 +178,6 @@ Input:
- {boolean} is_enabled DHCP使能控制参数
Return:
- 无
#### LwipEthProcessLoop
- 网卡接收数据包底层处理
```c
void LwipEthProcessLoop(struct netif *netif);
```
Note:
- 在main函数中循环调用,轮询处理到来的网络数据包
Input:
- {struct netif} *netif 网卡对象
Return:
- 无

21
drivers/eth/fgmac/fgmac.c

@ -164,6 +164,23 @@ FError FGmacDeInitialize(FGmac *instance_p)
return ret;
}
/**
* @name: FGmacMmcIntrMask
* @msg: Mask mmc irq
* @param {FGmac} *instance_p, instance of FGmac controller
* @return {*}
*/
static void FGmacMmcIntrMask(FGmac *instance_p)
{
FASSERT(instance_p);
uintptr base_addr = instance_p->config.base_addr;
FGMAC_WRITE_REG32(base_addr,FGMAC_MMC_TX_INTR_MASK_OFFSET,FGMAC_MMC_DEFAULT_MASK);
FGMAC_WRITE_REG32(base_addr,FGMAC_MMC_RX_INTR_MASK_OFFSET,FGMAC_MMC_DEFAULT_MASK);
FGMAC_WRITE_REG32(base_addr,FGMAC_MMC_RX_IPC_INTR_MASK,FGMAC_MMC_DEFAULT_MASK);
}
/**
* @name: FGmacReset
* @msg: reset FGMAC controller
@ -192,8 +209,8 @@ static FError FGmacReset(FGmac *instance_p)
/* do software reset per init */
ret = FGmacSoftwareReset(base_addr, FGMAC_RETRY_TIMES);
/* To mask all mmc interrupts */
FGmacMmcIntrMask(instance_p);
/* disable gmac & dma interrupts */
FGmacSetInterruptMask(instance_p, FGMAC_CTRL_INTR, FGMAC_ISR_MASK_ALL_BITS);
FGmacSetInterruptMask(instance_p, FGMAC_DMA_INTR, FGMAC_DMA_INTR_ENA_ALL_MASK);

8
drivers/eth/fgmac/fgmac_hw.h

@ -75,6 +75,14 @@ extern "C"
#define FGMAC_MAC_ADDR1_LOWER32BIT_OFFSET 0x4CU /* 第二个 MAC 地址的低 32 位。。 */
#define FGMAC_MAC_PHY_STATUS 0xD8U /* MAC PHY 状态 */
/**** FGMAC MMC CTRL ****/
#define FGMAC_MMC_CR_OFFSET 0x0100U /* 以太网 MMC 控制寄存器 */
#define FGMAC_MMC_RX_INTR_OFFSET 0x0104U /* 以太网 MMC 接收中断寄存器 */
#define FGMAC_MMC_TX_INTR_OFFSET 0x0108U /* 以太网 MMC 发送中断寄存器 */
#define FGMAC_MMC_RX_INTR_MASK_OFFSET 0x010CU /* 以太网 MMC 接收中断屏蔽寄存器 */
#define FGMAC_MMC_TX_INTR_MASK_OFFSET 0x0110U /* 以太网 MMC 发送中断屏蔽寄存器 */
#define FGMAC_MMC_RX_IPC_INTR_MASK 0x0200U /* 以太网 MMC 接收校验和卸载中断屏蔽寄存器 */
#define FGMAC_MMC_DEFAULT_MASK GENMASK(31, 0)
/**** FGMAC DMA CTRL ****/
#define FGMAC_DMA_BUS_MODE_OFFSET 0x1000U /* 总线模式寄存器 */
#define FGMAC_DMA_TX_POLL_REQ_OFFSET 0x1004U /* 发送轮询请求寄存器 */

2
drivers/eth/fxmac/fxmac.c

@ -628,7 +628,7 @@ static void FXmacReset(FXmac *instance_p)
{
u32 reg_val, write_reg = 0;
u8 i;
s8 mac_addr[6] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
u8 mac_addr[6] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
FASSERT(instance_p != NULL);

10
drivers/eth/fxmac/fxmac_bdring.c

@ -499,7 +499,6 @@ u32 FXmacBdRingFromHwTx(FXmacBdRing *ring_ptr, u32 bd_limit,
u32 bd_str = 0U;
u32 bd_count;
u32 bd_partial_count;
u32 Sop = 0U;
u32 status;
u32 bd_limitLoc = bd_limit;
cur_bd_ptr = ring_ptr->hw_head;
@ -533,11 +532,7 @@ u32 FXmacBdRingFromHwTx(FXmacBdRing *ring_ptr, u32 bd_limit,
bd_str = FXMAC_BD_READ(cur_bd_ptr, FXMAC_BD_STAT_OFFSET);
}
if ((Sop == 0x00000000U) && ((bd_str & FXMAC_TXBUF_USED_MASK) != 0x00000000U))
{
Sop = 1U;
}
if (Sop == 0x00000001U)
if ((bd_str & FXMAC_TXBUF_USED_MASK) != 0x00000000U)
{
bd_count++;
bd_partial_count++;
@ -547,9 +542,8 @@ u32 FXmacBdRingFromHwTx(FXmacBdRing *ring_ptr, u32 bd_limit,
* If it is clear, then there are more BDs for the current
* packet. Keep a count of these partial packet BDs.
*/
if ((Sop == 0x00000001U) && ((bd_str & FXMAC_TXBUF_LAST_MASK) != 0x00000000U))
if ((bd_str & FXMAC_TXBUF_LAST_MASK) != 0x00000000U)
{
Sop = 0U;
bd_partial_count = 0U;
}

5
drivers/eth/fxmac/fxmac_debug.c

@ -38,7 +38,7 @@ void FXmacDebugTxPrint(FXmac *instance_p)
{
FXmacConfig *config_p;
config_p = &instance_p->config;
FUNUSED(config_p);
FXMAC_INFO("octets_txed_bottom is 0x%x",FtIn32(config_p->base_address+FXMAC_OCTTXL_OFFSET));
FXMAC_INFO("octets_txed_top is 0x%x",FtIn32(config_p->base_address+FXMAC_OCTTXH_OFFSET));
FXMAC_INFO("frames_txed_ok is 0x%x",FtIn32(config_p->base_address+FXMAC_TXCNT_OFFSET));
@ -66,7 +66,7 @@ void FXmacDebugRxPrint(FXmac *instance_p)
{
FXmacConfig *config_p;
config_p = &instance_p->config;
FUNUSED(config_p);
FXMAC_INFO("octets_rxed_bottom is 0x%x",FtIn32(config_p->base_address+FXMAC_OCTRXL_OFFSET));
FXMAC_INFO("octets_rxed_top is 0x%x",FtIn32(config_p->base_address+FXMAC_OCTRXH_OFFSET));
FXMAC_INFO("frames_rxed_ok is 0x%x",FtIn32(config_p->base_address+FXMAC_RXCNT_OFFSET));
@ -99,6 +99,7 @@ void FXmacDebugUsxPrint(FXmac *instance_p)
{
FXmacConfig *config_p;
config_p = &instance_p->config;
FUNUSED(config_p);
FXMAC_INFO("USXGMII control register is 0x%x",FtIn32(config_p->base_address+FXMAC_GEM_USX_CONTROL_OFFSET));
FXMAC_INFO("USXGMII Status Register is 0x%x",FtIn32(config_p->base_address+FXMAC_GEM_USX_STATUS_OFFSET));

1
drivers/eth/fxmac/fxmac_phy.c

@ -25,7 +25,6 @@
#include "fxmac.h"
#include "eth_ieee_reg.h"
#include "fdrivers_port.h"
#include "sdkconfig.h"
#if defined(CONFIG_FXMAC_PHY_YT)
#include "phy_yt.h"

2
drivers/mmc/fsdif/fsdif_dma.c

@ -60,7 +60,7 @@ static void FSdifDumpDMADescriptor(FSdif *const instance_p, u32 desc_in_use)
{
u32 loop;
volatile FSdifIDmaDesc *cur_desc = NULL;
FUNUSED(cur_desc);
if (instance_p->desc_list.first_desc)
{
for (loop = 0; loop < desc_in_use; loop++)

3
drivers/mmc/fsdif/fsdif_intr.c

@ -153,7 +153,8 @@ void FSdifInterruptHandler(s32 vector, void *param)
dmac_events = FSDIF_READ_REG(base_addr, FSDIF_DMAC_STATUS_OFFSET);
event_mask = FSDIF_READ_REG(base_addr, FSDIF_INT_MASK_OFFSET);
dmac_evt_mask = FSDIF_READ_REG(base_addr, FSDIF_DMAC_INT_EN_OFFSET);
FUNUSED(dmac_evt_mask);
if (!(events & FSDIF_INT_ALL_BITS) &&
!(dmac_events & FSDIF_DMAC_STATUS_ALL_BITS))
{

42
drivers/qspi/fqspi/fqspi_flash.c

@ -494,7 +494,12 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command)
case FQSPI_FLASH_CMD_QIOR:
/* set SR1V and CR1V */
FQspiFlashEnableWrite(pctrl);
ret = FQspiFlashEnableWrite(pctrl);
if (ret != FT_SUCCESS)
{
FQSPI_ERROR("FQspiFlashEnableWrite failed!");
return ret;
}
pctrl->rd_cfg.rd_addr_sel = FQSPI_ADDR_SEL_3;
pctrl->rd_cfg.rd_transfer = FQSPI_TRANSFER_1_4_4;
@ -510,7 +515,7 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command)
if (FQSPI_SUCCESS != ret)
{
FQSPI_ERROR("Failed to write cmd wrr, test result 0x%x", ret);
return 0;
return ret;
}
}
else if (pctrl->mf_id == FQSPI_FLASH_MF_ID_GIGADEVICE)
@ -521,7 +526,7 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command)
if (FQSPI_SUCCESS != ret)
{
FQSPI_ERROR("Failed to write cmd wrr, test result 0x%x", ret);
return 0;
return ret;
}
}
else if (pctrl->mf_id == FQSPI_FLASH_MF_ID_BOYA)
@ -531,7 +536,7 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command)
if (FQSPI_SUCCESS != ret)
{
FQSPI_ERROR("Failed to write cmd wrr, test result 0x%x", ret);
return 0;
return ret;
}
}
@ -597,7 +602,12 @@ FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8
}
/* Flash write enable */
FQspiFlashEnableWrite(pctrl);
ret = FQspiFlashEnableWrite(pctrl);
if (ret != FT_SUCCESS)
{
FQSPI_ERROR("FQspiFlashEnableWrite failed!");
return ret;
}
memset(&pctrl->wr_cfg, 0, sizeof(pctrl->wr_cfg));
/* set cmd region, command */
@ -779,7 +789,12 @@ FError FQspiFlashPortWriteData(FQspiCtrl *pctrl, u8 cmd, u32 chip_addr, u8 *buf,
uintptr base_addr = pctrl->config.base_addr;
/* Flash write enable */
FQspiFlashEnableWrite(pctrl);
ret = FQspiFlashEnableWrite(pctrl);
if (ret != FT_SUCCESS)
{
FQSPI_ERROR("FQspiFlashEnableWrite failed!");
return ret;
}
memset(&pctrl->cmd_def, 0, sizeof(pctrl->cmd_def));
pctrl->cmd_def.cmd = cmd;
@ -837,7 +852,13 @@ FError FQspiFlashErase(FQspiCtrl *pctrl, u8 command, u32 offset)
uintptr base_addr = pctrl->config.base_addr;
/* Flash write enable */
FQspiFlashEnableWrite(pctrl);
ret = FQspiFlashEnableWrite(pctrl);
if (ret != FT_SUCCESS)
{
FQSPI_ERROR("FQspiFlashEnableWrite failed!");
return ret;
}
memset(&pctrl->cmd_def, 0, sizeof(pctrl->cmd_def));
pctrl->cmd_def.cmd = command;
@ -1095,7 +1116,13 @@ FError FQspiFlashWProtectSet(FQspiCtrl *pctrl, boolean wprotect, u8 channel)
FError ret = FQSPI_SUCCESS;
u8 wp_block[2] = {FQSPI_FLASH_WP_ENABLE, FQSPI_FLASH_WP_DISABLE};
FQspiChannelSet(pctrl, channel);
/* Flash write enable */
ret = FQspiFlashEnableWrite(pctrl);
if (ret != FT_SUCCESS)
{
FQSPI_ERROR("FQspiFlashEnableWrite failed!");
return ret;
}
if (wprotect == TRUE)
{
ret = FQspiFlashWriteReg(pctrl, FQSPI_FLASH_CMD_WRR, &wp_block[0], 1);
@ -1104,5 +1131,6 @@ FError FQspiFlashWProtectSet(FQspiCtrl *pctrl, boolean wprotect, u8 channel)
{
ret = FQspiFlashWriteReg(pctrl, FQSPI_FLASH_CMD_WRR, &wp_block[1], 1);
}
return ret;
}

3
example/network/lwip_iperf/src/lwip_timer.c

@ -13,7 +13,7 @@
*
* FilePath: lwip_timer.c
* Created Date: 2023-09-20 11:29:05
* Last Modified: 2024-04-02 15:10:29
* Last Modified: 2024-04-18 09:46:49
* Description: This file is for lwip timer function implementation.
*
* Modify History:
@ -74,7 +74,6 @@ void LwipTestLoop(void)
{
if (netif->state)
{
LwipEthProcessLoop(netif);
LwipPortInput(netif);
LinkDetectLoop(netif);
}

4
example/network/lwip_jumbo/src/lwip_timer.c

@ -13,7 +13,7 @@
*
* FilePath: lwip_timer.c
* Created Date: 2023-09-20 11:29:05
* Last Modified: 2024-04-02 15:10:37
* Last Modified: 2024-04-18 09:46:37
* Description: This file is for lwip timer function implementation.
*
* Modify History:
@ -74,7 +74,7 @@ void LwipTestLoop(void)
{
if (netif->state)
{
LwipEthProcessLoop(netif);
LwipPortInput(netif);
LinkDetectLoop(netif);
}

4
example/network/lwip_multicast/src/lwip_timer.c

@ -13,7 +13,7 @@
*
* FilePath: lwip_timer.c
* Created Date: 2023-09-20 11:29:05
* Last Modified: 2024-04-02 15:11:18
* Last Modified: 2024-04-18 09:46:49
* Description: This file is for lwip timer function implementation.
*
* Modify History:
@ -74,7 +74,7 @@ void LwipTestLoop(void)
{
if (netif->state)
{
LwipEthProcessLoop(netif);
LwipPortInput(netif);
LinkDetectLoop(netif);
}

4
example/network/lwip_startup/src/lwip_timer.c

@ -13,7 +13,7 @@
*
* FilePath: lwip_timer.c
* Created Date: 2023-09-20 11:29:05
* Last Modified: 2024-04-02 15:10:11
* Last Modified: 2024-04-18 09:46:49
* Description: This file is for lwip timer function implementation.
*
* Modify History:
@ -74,7 +74,7 @@ void LwipTestLoop(void)
{
if (netif->state)
{
LwipEthProcessLoop(netif);
LwipPortInput(netif);
LinkDetectLoop(netif);
}

2
example/network/raw_api/common/lwip_start.c

@ -190,7 +190,7 @@ void LwipTestLoop(void)
{
if (netif->state)
{
LwipEthProcessLoop(netif);
LwipPortInput(netif);
LinkDetectLoop(netif);
}

2
example/peripherals/pwm/README.md

@ -137,7 +137,7 @@ bootelf -p 0x90100000
$ pwm single_channel
```
![pwm_dual_channel](./fig/pwm_dual_channel.png)
![pwm_single_channel](./fig/pwm_single_channel.png)
pwm单通道测试对应波形

4
third-party/lwip-2.1.2/ports/fgmac/fgmac_lwip_port.c

@ -404,9 +404,9 @@ void *FGmacLwipPortRx(FGmacLwipPort *instance_p)
p = pbuf_alloc(PBUF_RAW, length, PBUF_RAM);
}
#ifdef RAW_DATA_PRINT
#ifdef RAW_DATA_PRINT
dump_hex(Buffer, (u32)length);
#endif
#endif
if (p != NULL)
{
#if ETH_PAD_SIZE

76
third-party/lwip-2.1.2/ports/fxmac/ethernetif.c

@ -122,44 +122,6 @@ static void ethernetif_deinit(struct netif *netif)
FXmacLwipPortStop(instance_p);
}
static void ethernetif_poll(struct netif *netif)
{
struct LwipPort *lwip_port = (struct LwipPort *)(netif->state);
if(lwip_port == NULL)
{
FXMAC_LWIP_NET_PRINT_E("%s,lwip_port is NULL\n", __FUNCTION__);
return;
}
FXmac *instance_p = (FXmac *)(lwip_port->state);
if(instance_p == NULL)
{
FXMAC_LWIP_NET_PRINT_E("%s,Fxmac instance_p is NULL\n", __FUNCTION__);
return;
}
FXmacLwipPort * fxmac_port = (FXmacLwipPort *)(lwip_port->state) ;
SYS_ARCH_DECL_PROTECT(lev);
while (1)
{
SYS_ARCH_PROTECT(lev);
if(fxmac_port->recv_flg > 0)
{
fxmac_port->recv_flg -- ;
SYS_ARCH_UNPROTECT(lev);
FXMAC_WRITEREG32(instance_p->config.base_address, FXMAC_IER_OFFSET,instance_p->mask);
FXmacRecvHandler(instance_p->recv_args);
}
else
{
SYS_ARCH_UNPROTECT(lev);
break;
}
}
}
/*
* low_level_output():
*
@ -233,6 +195,43 @@ static void ethernetif_input(struct netif *netif)
{
struct eth_hdr *ethhdr;
struct pbuf *p;
struct LwipPort *lwip_port = (struct LwipPort *)(netif->state);
if(lwip_port == NULL)
{
FXMAC_LWIP_NET_PRINT_E("%s,lwip_port is NULL\n", __FUNCTION__);
return;
}
FXmac *instance_p = (FXmac *)(lwip_port->state);
if(instance_p == NULL)
{
FXMAC_LWIP_NET_PRINT_E("%s,Fxmac instance_p is NULL\n", __FUNCTION__);
return;
}
FXmacLwipPort * fxmac_port = (FXmacLwipPort *)(lwip_port->state) ;
SYS_ARCH_DECL_PROTECT(lev);
while (1)
{
SYS_ARCH_PROTECT(lev);
if(fxmac_port->recv_flg > 0)
{
fxmac_port->recv_flg -- ;
SYS_ARCH_UNPROTECT(lev);
FXMAC_WRITEREG32(instance_p->config.base_address, FXMAC_IER_OFFSET,instance_p->mask);
FXmacRecvHandler(instance_p->recv_args);
}
else
{
SYS_ARCH_UNPROTECT(lev);
break;
}
}
while(1)
{
/* move received packet into a new pbuf */
@ -413,7 +412,6 @@ static err_t low_level_init(struct netif *netif)
lwip_port->ops.eth_deinit = ethernetif_deinit;
lwip_port->ops.eth_start = ethernetif_start;
lwip_port->ops.eth_debug = ethernetif_debug;
lwip_port->ops.eth_poll = ethernetif_poll;
FXMAC_LWIP_NET_PRINT_I("ready to leave netif \r\n");
return ERR_OK;
}

65
third-party/lwip-2.1.2/ports/lwip_port.c

@ -23,7 +23,6 @@
* 1.1 liuzhihong 2022/11/7 function and variable naming adjustment
*/
#include <string.h>
#include "sdkconfig.h"
@ -67,7 +66,6 @@
#define LWIP_RX_THREAD_NAME "_lwip_rx"
#define LWIP_MAX_NAME_LENGTH 32
#if !NO_SYS
#define THREAD_STACKSIZE 4096
#define LINK_DETECT_THREAD_INTERVAL_MSEC 1000
@ -78,17 +76,31 @@ void link_detect_thread(void *p);
#else
static u32 dhcp_trans_timeout_msec_cnt = 0 ;
static u32 dhcp_lease_renewal_msec_cnt = 0 ;
#endif
/* Define those to better describe your network interface. */
#if defined(CONFIG_LWIP_FGMAC)
extern err_t ethernetif_gmac_init(struct netif *netif);
/* GMAC创建一个计数信号量,信号量的最大值是1,初始值为0 */
#define SEMAPHORE_MAXCOUNT 1
#define SEMAPHORE_INITIALCOUNT 0
#endif
#if defined(CONFIG_LWIP_FXMAC)
extern err_t ethernetif_xmac_init(struct netif *netif);
/* XMAC创建一个计数信号量,信号量的最大值是128,初始值为0 */
#define SEMAPHORE_MAXCOUNT 128
#define SEMAPHORE_INITIALCOUNT 0
#endif
#ifndef SEMAPHORE_MAXCOUNT
#define SEMAPHORE_MAXCOUNT 1
#endif
#ifndef SEMAPHORE_INITIALCOUNT
#define SEMAPHORE_INITIALCOUNT 0
#endif
/*
* LwipPortAdd: this is a wrapper around lwIP's netif_add function.
* The objective is to provide portability between the different MAC's
@ -172,31 +184,30 @@ struct netif *LwipPortAdd(struct netif *netif,
/* Start thread to detect link periodically for Hot Plug autodetect */
if(netif_p)
{
#if defined(CONFIG_LWIP_PORT_USE_LINK_DETECT_THREAD)
#if defined(CONFIG_LWIP_PORT_USE_LINK_DETECT_THREAD)
memcpy(detect_thread_name, netif->name, 2);
strcpy(&detect_thread_name[2], LWIP_PHY_DETECT_THREAD_NAME);
lwip_port = (struct LwipPort *)netif_p->state;
lwip_port->detect_thread_handle = sys_thread_new(detect_thread_name, link_detect_thread, netif,
CONFIG_LWIP_PORT_LINK_DETECT_STACKSIZE, CONFIG_LWIP_PORT_LINK_DETECT_PRIORITY);
#endif
/* create semaphore for rx thread */
#if defined(CONFIG_LWIP_PORT_USE_RECEIVE_THREAD)
sys_sem_new(&lwip_port->sem_rx_data_available, 0);
#endif
/* create semaphore for rx thread */
#if defined(CONFIG_LWIP_PORT_USE_RECEIVE_THREAD)
sys_countingsem_create(&lwip_port->sem_rx_data_available,SEMAPHORE_MAXCOUNT,SEMAPHORE_INITIALCOUNT);
memcpy(rx_thread_name, netif->name, 2);
strcpy(&rx_thread_name[2], LWIP_RX_THREAD_NAME);
lwip_port->rx_thread_handle = sys_thread_new(rx_thread_name, (lwip_thread_fn)LwipPortInputThread, netif,
CONFIG_LWIP_PORT_RECEIVE_THREAD_STACKSIZE, CONFIG_LWIP_PORT_RECEIVE_THREAD_PRIORITY);
#endif
#endif
if(lwip_port->ops.eth_start)
{
if(lwip_port->ops.eth_start)
{
/* start mac controller */
lwip_port->ops.eth_start(netif_p);
}
}
}
else
{
@ -229,7 +240,6 @@ void LwipPortInputThread(struct netif *netif)
struct LwipPort *emac;
FASSERT(netif != NULL);
emac = (struct LwipPort *)netif->state;
FDriverSdelay(1);
while (1)
{
/* sleep until there are packets to process
@ -237,16 +247,6 @@ void LwipPortInputThread(struct netif *netif)
* routine.
*/
sys_arch_sem_wait(&emac->sem_rx_data_available,0);
#if defined(CONFIG_LWIP_FXMAC)
if(emac->ops.eth_poll)
{
emac->ops.eth_poll(netif);
}
else
{
LWIP_PORT_ERROR("emac->ops.eth_poll is null");
}
#endif
/* move all received packets to lwIP */
if(emac->ops.eth_input)
{
@ -571,18 +571,3 @@ void LwipPortDebug(const char *name)
}
}
void LwipEthProcessLoop(struct netif *netif)
{
struct LwipPort *emac;
FASSERT(netif != NULL);
FASSERT(netif->state != NULL);
emac = (struct LwipPort *)netif->state;
if(emac->ops.eth_poll)
{
emac->ops.eth_poll(netif);
}
else
{
LWIP_PORT_ERROR("emac->ops.eth_poll is null");
}
}

2
third-party/lwip-2.1.2/ports/lwip_port.h

@ -111,7 +111,6 @@ typedef struct
void (*eth_deinit)(struct netif *netif);/*LwipPortStop call*/
void (*eth_start)(struct netif *netif); /*LwipPortAdd call*/
void (*eth_debug)(struct netif *netif);
void (*eth_poll)(struct netif *netif);
} LwipPortOps;
@ -135,7 +134,6 @@ void LwipPortInput(struct netif *netif);
#if !NO_SYS
void LwipPortInputThread(struct netif *netif);
#else
void LwipEthProcessLoop(struct netif *netif);
void LinkDetectLoop(struct netif *netif);
#endif

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