!80 修改DDMA最大传输，增加例程说明

arch/armv8/aarch32/gcc/fvector.S

@@ -1,137 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc. 
- * All Rights Reserved.
- *  
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it  
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,  
- * either version 1.0 of the License, or (at your option) any later version. 
- *  
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;  
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details. 
- *  
- * 
- * FilePath: vector.S
- * Date: 2022-02-10 14:53:41
- * LastEditTime: 2022-02-17 17:28:06
- * Description:  This file is for the initial vector table for the processor
- * 
- * Modify History: 
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- * 1.0   huanghe     2021/7/3     first release
- */
-
-
-
-
-.globl _boot
-.globl _vector_table
-
-.globl FiqInterruptHandler
-.globl IrqInterruptHandler
-.globl SwInterruptHandler
-.globl DataAbortInterruptHandler
-.globl PrefetchAbortInterruptHandler
-.globl UndefineInterruptHandler
-
-
-.set EXCEPTION_FRAME_SIZE, (17*4)
-.set EXCEPTION_PC_OFFSET, (15*4)
-.set EXCEPTION_CPSR_OFFSET, (16*4)
-.set EXCEPTION_SP_OFFSET, (13*4)
-.set EXCEPTION_PC_OFFSET, (14*4)
-
-/* allocatable and executable */
-.section .vectors, "a"
-
-_vector_table:
-    B	_boot
-	B	Undefined
-	B	SVCHandler
-	B	PrefetchAbortHandler
-	B	DataAbortHandler
-	NOP	/* Placeholder for address exception vector*/
-	B	IrqHandler
-	B	FiqHandler
-
-IrqHandler: /* 0x18 IRQ */
-    stmdb	sp!,{r0-r3,r12,lr}		/* state save from compiled code*/
-    vpush {d0-d7}
-	vpush {d16-d31}
-	vmrs r1, FPSCR
-	push {r1}
-	vmrs r1, FPEXC
-	push {r1}
-
-    /* Read value from the interrupt acknowledge register, which is stored in r0
-	for future parameter and interrupt clearing use. */
-    mrc p15, 0, r0, c12, c12, 0
-    isb
-
-    /* save r0 which is interrupt num, lr pushed to maintain alignment */
-    PUSH	{r0, lr}
-
-    bl	FExceptionInterruptHandler	/* IRQ vector */    
-    
-    /* get r0 value which is interrupt num */
-    POP	    {r0, lr}
-
-    /* Write the value read from ICCIAR to ICCEOIR, end interrupt.*/
-	mcr p15, 0, r0, c12, c12, 1
-	isb
-
-	pop 	{r1}
-	vmsr    FPEXC, r1
-	pop 	{r1}
-	vmsr    FPSCR, r1
-	vpop    {d16-d31}
-	vpop    {d0-d7}
-
-	ldmia	sp!,{r0-r3,r12,lr}		/* state restore from compiled code */
-
-	subs	pc, lr, #4			/* adjust return */
-
-
-
-
-.macro PushExceptionReg
-    sub     sp, sp, #EXCEPTION_FRAME_SIZE         /* Sizeof(ExceptionFrame)  */
-    stmia   sp, {r0 - r12}          /* Calling r0-r12                  */
-    mov     r0, sp
-    mrs     r6, spsr                /* Save CPSR                       */
-    str     lr, [r0, #15*4]         /* Push PC                         */
-    str     r6, [r0, #16*4]         /* Push CPSR                       */
-    cps     #0x1F                   /* C运行环境所运行的模式             */
-    str     sp, [r0, #13*4]         /* Save calling SP                 */
-    str     lr, [r0, #14*4]         /* Save calling PC                 */
-.endm
-
-
-Undefined:  /* Undefined handler */
-    PushExceptionReg
-    cps #0x1B
-    bl UndefineInterruptHandler
-    bl .
-
-SVCHandler:
-    PushExceptionReg
-    bl SwInterruptHandler
-    bl .
-
-PrefetchAbortHandler:
-    PushExceptionReg
-    bl PrefetchAbortInterruptHandler
-    bl .
-
-DataAbortHandler:
-    PushExceptionReg
-    bl DataAbortInterruptHandler
-    bl .
-
-FiqHandler:					/* FIQ vector handler */
-    PushExceptionReg
-    bl FiqInterruptHandler
-    bl .
-
-.end

arch/common/fl3cache.c

@@ -1,137 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: fl3cache.c
- * Date: 2022-03-08 21:56:42
- * LastEditTime: 2022-03-15 11:10:40
- * Description:  This file is for l3 cache-related operations
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- * 1.0   huanghe    2022/03/15       first release
- */
-
-
-#include "fl3cache.h"
-#include "sdkconfig.h"
-
-
-
-/***************************** Include Files *********************************/
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/************************** Variable Definitions *****************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-/* FLUSH L3 CASHE */
-#ifdef CONFIG_USE_L3CACHE
-    #define HNF_BASE (unsigned long)(0x3A200000)
-    #define HNF_COUNT 0x8
-    #define HNF_PSTATE_REQ (HNF_BASE + 0x10)
-    #define HNF_PSTATE_STAT (HNF_BASE + 0x18)
-    #define HNF_PSTATE_OFF 0x0
-    #define HNF_PSTATE_SFONLY 0x1
-    #define HNF_PSTATE_HALF 0x2
-    #define HNF_PSTATE_FULL 0x3
-    #define HNF_STRIDE 0x10000
-#endif
-
-/************************** Function Prototypes ******************************/
-
-void FCacheL3CacheDisable(void)
-{
-#ifdef CONFIG_USE_L3CACHE
-    int i, pstate;
-
-
-    for (i = 0; i < 8; i++)
-    {
-        FtOut32(0x3A200010 + i * 0x10000, 1);
-    }
-
-    for (i = 0; i < 8; i++)
-    {
-        do
-        {
-            pstate = FtIn32(0x3A200018 + i * 0x10000);
-        }
-        while ((pstate & 0xf) != (0x1 << 2));
-    }
-#endif
-}
-
-
-void FCacheL3CacheFlush(void)
-{
-#ifdef CONFIG_USE_L3CACHE
-    int i, pstate;
-
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        FtOut64(HNF_PSTATE_REQ + i * HNF_STRIDE, HNF_PSTATE_SFONLY);
-    }
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        do
-        {
-            pstate = FtIn64(HNF_PSTATE_STAT + i * HNF_STRIDE);
-        }
-        while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
-    }
-
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        FtOut64(HNF_PSTATE_REQ + i * HNF_STRIDE, HNF_PSTATE_FULL);
-    }
-
-#endif
-    return ;
-}
-
-
-void FCacheL3CacheInvalidate(void)
-{
-#ifdef CONFIG_USE_L3CACHE
-    int i, pstate;
-
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        FtOut64(HNF_PSTATE_REQ + i * HNF_STRIDE, HNF_PSTATE_SFONLY);
-    }
-
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        do
-        {
-            pstate = FtIn64(HNF_PSTATE_STAT + i * HNF_STRIDE);
-        }
-        while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
-    }
-
-    for (i = 0; i < HNF_COUNT; i++)
-    {
-        FtOut64(HNF_PSTATE_REQ + i * HNF_STRIDE, HNF_PSTATE_FULL);
-    }
-#endif
-    return ;
-}
-
-
-void FCacheL3CacheEnable(void)
-{
-    return ;
-}

arch/common/fl3cache.h

@@ -1,49 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: fl3cache.h
- * Date: 2022-03-08 21:56:42
- * LastEditTime: 2022-03-15 11:14:45
- * Description:  This file is for l3 cache-related operations
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- * 1.0   huanghe    2021/10/21       first release
- */
-
-
-#ifndef FL3CACHE_H
-#define FL3CACHE_H
-
-#include "fparameters.h"
-#include "fio.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************** Function Prototypes ******************************/
-
-
-void FCacheL3CacheEnable(void);
-void FCacheL3CacheDisable(void);
-void FCacheL3CacheInvalidate(void);
-void FCacheL3CacheFlush(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

arch/common/flinkage.h

@@ -1,96 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: flinkage.h
- * Date: 2022-02-10 14:53:41
- * LastEditTime: 2022-02-17 17:35:12
- * Description:  This files is for assembler code format macro definition
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- *  1.0  huanghe	2021/11/06		first release
- */
-
-
-#ifndef FLINKAGE_H
-#define FLINKAGE_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/* Some toolchains use other characters (e.g. '`') to mark new line in macro */
-#ifndef ASM_NL
-    #define ASM_NL ;
-#endif
-
-#ifdef __cplusplus
-    #define CPP_ASMLINKAGE extern "C"
-#else
-    #define CPP_ASMLINKAGE
-#endif
-
-#ifndef asmlinkage
-    #define asmlinkage CPP_ASMLINKAGE
-#endif
-
-#define SYMBOL_NAME_STR(X) #X
-#define SYMBOL_NAME(X) X
-#ifdef __STDC__
-#define SYMBOL_NAME_LABEL(X) X##:
-#else
-#define SYMBOL_NAME_LABEL(X) \
-    X:
-#endif
-
-#ifndef __ALIGN
-    #define __ALIGN .align 4
-#endif
-
-#ifndef __ALIGN_STR
-    #define __ALIGN_STR ".align 4"
-#endif
-
-#define ALIGN __ALIGN
-#define ALIGN_STR __ALIGN_STR
-
-#define LENTRY(name) \
-    ALIGN ASM_NL     \
-    SYMBOL_NAME_LABEL(name)
-
-#define ENTRY(name)                 \
-    .globl SYMBOL_NAME(name) ASM_NL \
-    LENTRY(name)
-
-#define WEAK(name)                 \
-    .weak SYMBOL_NAME(name) ASM_NL \
-    LENTRY(name)
-
-#ifndef END
-#define END(name) \
-    .size name, .- name
-#endif
-
-#ifndef ENDPROC
-#define ENDPROC(name)          \
-    .type name STT_FUNC ASM_NL \
-    END(name)
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

arch/common/fmacro.h

@@ -1,54 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: fmacro.h
- * Date: 2022-02-10 14:53:41
- * LastEditTime: 2022-02-17 17:35:17
- * Description:  This files is for the current execution state selects the macro definition
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- *  1.0  huanghe	2021/11/06		first release
- */
-
-
-#ifndef FMACRO_H
-#define FMACRO_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*
- * Branch according to exception level
- */
-/*
- * Branch according to exception level
- */
-.macro  switch_el, xreg, el3_label, el2_label, el1_label
-mrs \xreg, CurrentEL
-cmp \xreg, 0xc
-b.eq    \el3_label
-cmp \xreg, 0x8
-b.eq    \el2_label
-cmp \xreg, 0x4
-b.eq    \el1_label
-.endm
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __ASM_ARM_MACRO_H__ */

arch/common/ftrace.h

@@ -1,58 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: ftrace.h
- * Date: 2022-06-09 16:35:50
- * LastEditTime: 2022-06-09 16:35:51
- * Description:  This file is for trace macro definition
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------     --------    --------------------------------------
- * 1.0   zhugengyu  2022/6/13    first release
- */
-#ifndef FTRACE_H
-#define FTRACE_H
-
-/***************************** Include Files *********************************/
-#if !defined(__ASSEMBLER__)
-#include "ftypes.h"
-#endif
-
-#include "fparameters.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-#define FTRACE_UART_BASE    FUART1_BASE_ADDR /* UART-1 as trace Uart */
-#define FTRACE_UART_UARTDR (FTRACE_UART_BASE + 0x0U)  /* UART data register offset */
-#define FTRACE_UART_UARTFR (FTRACE_UART_BASE + 0x18U) /* UART status register offset */
-
-/************************** Function Prototypes ******************************/
-
-/************************** Variable Definitions *****************************/
-
-/*****************************************************************************/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

baremetal/example/peripheral/serial/fpl011_flow_dma/README.md

@@ -6,7 +6,7 @@
 
 - 本例程实现了UART 上下位机通信，下位机是E2000 demo开发板的UART2，负责5线串口数据通信,此例程中我们下位机端采用flow、ddma或者两者组合的模式去与上位机通信。
 - flow模式，我们需要支持流控的上位机串口通信软件进行，从机先发送数据，上位机打开RTS，接收到数据，然后上位机进行数据回复，我们将上位机发送数据打印出来（10bytes）。
-- ddma模式，需要注意的地方是，我们ddma仅仅支持32位，4bytes的最小传输，最大64bytes的最大数量的单次传输，由于我们的串口收发寄存器是8位，单字节，存在着位宽不匹配的情况，所以我们需要进行数据转换牺牲部分性能，单次最大16bytes的传输。
+- ddma模式，需要注意的地方是，我们ddma仅仅支持32位，4bytes的最小传输。由于我们的串口收发寄存器是8位，单字节，存在着位宽不匹配的情况，所以我们需要在数据发送开始之前或者数据接收完成后进行数据转换。
 
 ## 2. 如何使用例程
 
@@ -68,7 +68,7 @@ E2000Q对应的配置项是：
 
 对应的配置项是，
 
-- CONFIG_TARGET_E2000Q
+- CONFIG_TARGET_E2000D
 
 ### 2.2 SDK配置方法
 
@@ -81,7 +81,7 @@ E2000Q对应的配置项是：
 - 选择目标平台和例程需要的配置,如对Q芯片板进行配置加载
 
 ```
-make load_e2000q_aarch64
+make load_e2000d_aarch64
 ```
 
 - 进行编译
@@ -121,6 +121,7 @@ bootelf -p 0x90100000
 - 启动 DMA 传输
 
 - 一键测试例程,测试UART2在flow control与ddma开启时的传输，上位机需要打开RTS才能接收到数据
+- 上位机发送同样多的数据，串口来接收打印
 
 ```
 $ pl011 init
@@ -137,6 +138,7 @@ $ pl011
 ![help](./figs/pl011_help.png)
 
 - 仅仅开启flow control,'2'表示串口号,'1'表示模式仅仅使用流控，使用完请'deinit'
+- 只接收10个字节，打印输出
 
 ```
 $ pl011 init 2 1
@@ -165,3 +167,4 @@ $ pl011 init 2 2
 ><font size="1">记录例程的重大修改记录，标明修改发生的版本号 </font><br />
 
 - 2022-09-26 ：v0.1.0 首次合入
+- 2023-06-12 ：v0.1.1 修改DDMA的最大传输量

baremetal/example/peripheral/serial/fpl011_flow_dma/src/cmd_uart_flow_dma.c

@@ -43,7 +43,7 @@
 
 /************************** Variable Definitions *****************************/
 
-static const u8 tx_const[] = "0123456789abcdef";
+static const u8 tx_const[] = "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef";
 
 /************************** Function Prototypes ******************************/
 
@@ -56,7 +56,7 @@ static void FDdmaCmdUsage()
     printf("           <mode>:0~FPL011_FLOW_DMA_NONE 1~FPL011_FLOW_MODE_ONLY 2~FPl011_DMA_MODE_ONLY 3~FPL011_FLOW_DMA_BOTH.\r\n");
     printf("           <rx channel>: 0 ~ 7\r\n");
     printf("           <tx channel>: 0 ~ 7\r\n");
-    printf("           <string>: what you want,strlen: 0 ~ 16.\r\n");
+    printf("           <string>: what you want,strlen: < size of buffer define.\r\n");
     printf("    pl011 send\r\n");
     printf("        -- send \"Hello World.\" use flow control uart.But need deinit,if you want use other mode.\r\n");
     printf("    pl011 deint\r\n");
@@ -79,9 +79,7 @@ static int FDdmaCmdEntry(int argc, char *argv[])
         u32 rx_chan = 0;/*default*/
         u32 tx_chan = 1;/*default*/
         u32 uart_id = FUART2_ID;/*default,for release board.*/
-        const u8 *input = tx_const; /*default,FDDMA_MAX_TRANSFER_LEN/4*/
-
-        printf("tx_const:%d\r\n", strlen(tx_const));
+        const u8 *input = tx_const; /*default*/
 
         if (argc >= 3)
         {
@@ -111,7 +109,7 @@ static int FDdmaCmdEntry(int argc, char *argv[])
         {
             input = argv[6];
         }
-        printf("input:%d\r\n", strlen(input));
+        
         ret = FDdmaFlowUartTest(uart_id, mode, tx_chan, rx_chan, input, strlen(input), strlen(input));
 
         if (mode == FPl011_DMA_MODE_ONLY || mode == FPl011_DMA_MODE_ONLY)

baremetal/example/peripheral/serial/fpl011_flow_dma/src/uart_flow_dma.c

@@ -39,7 +39,7 @@
 #include "fddma_hw.h"
 
 /************************** Constant Definitions *****************************/
-#define FDDMA_TX_RX_BUF_LEN     64
+#define FDDMA_TX_RX_BUF_LEN     1024 /*大量数据请配合修改 timeout 大小*/
 #define FDDMA_RX_POLL_BUF       10
 #define UART_TEST_DEBUG_TAG "UART_FLOW_DMA"
 
@@ -64,8 +64,8 @@ static const u32 pl011_tx_slave_id[FUART_NUM] =
     [FUART3_ID] = FDDMA0_UART3_TX_SLAVE_ID
 };
 
-static u32 tx_buf[FDDMA_TX_RX_BUF_LEN / 4] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGMENT))) = {0};
-static u32 rx_buf[FDDMA_TX_RX_BUF_LEN / 4] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGMENT))) = {0};
+static u32 tx_buf[FDDMA_TX_RX_BUF_LEN] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGMENT))) = {0};
+static u32 rx_buf[FDDMA_TX_RX_BUF_LEN] __attribute__((aligned(FDDMA_DDR_ADDR_ALIGMENT))) = {0};
 
 static u8 rx_poll_buf[FDDMA_RX_POLL_BUF];
 
@@ -373,7 +373,7 @@ FError FPl011StopDMATransfer(FPl011DDMA *const instance)
 static void FU8buff2U32buff(u32 *buff1, const u8 *buff2, u32 size)
 {
     FASSERT(buff1 && buff2);
-    FASSERT(size < (FDDMA_MAX_TRANSFER_LEN + 1));
+    FASSERT(size < (FDDMA_TX_RX_BUF_LEN + 1));
 
     for (size_t i = 0; i < size; i++)
     {
@@ -393,7 +393,7 @@ static void FU8buff2U32buff(u32 *buff1, const u8 *buff2, u32 size)
 static void FU32buff2U8buff(u8 *buff1, u32 *buff2, u32 size)
 {
     FASSERT(buff1 && buff2);
-    FASSERT(size < (FDDMA_MAX_TRANSFER_LEN + 1));
+    FASSERT(size < (FDDMA_TX_RX_BUF_LEN + 1));
 
     for (size_t i = 0; i < size; i++)
     {
@@ -492,13 +492,13 @@ void FUartHelloWorld(void)
  */
 FError FDdmaFlowUartTest(u32 uart_id, u32 mode, FDdmaChanIndex tx_chan_idx, FDdmaChanIndex rx_chan_idx, const u8 *ptxchar, u32 tx_bytes, u32 rx_bytes)
 {
-    FASSERT(tx_bytes <= (FDDMA_MAX_TRANSFER_LEN / 4) && tx_bytes >= (FDDMA_MIN_TRANSFER_LEN / 4)); /* 1~16 bytes */
+    FASSERT(tx_bytes <= (FDDMA_TX_RX_BUF_LEN) && tx_bytes >= (FDDMA_MIN_TRANSFER_LEN)); 
     FError err = FT_SUCCESS;
     const u32 ddma_id = FDDMA0_ID; /* uart use ddma0 only */
     u32 recv_count;
     int timeout = 1000;
 
-    u8 prxchar[FDDMA_MAX_TRANSFER_LEN];
+    u8 prxchar[FDDMA_TX_RX_BUF_LEN];
     memset(rx_buf, 0, sizeof(rx_buf));
     memset(prxchar, 0, sizeof(prxchar));
 
@@ -514,6 +514,7 @@ FError FDdmaFlowUartTest(u32 uart_id, u32 mode, FDdmaChanIndex tx_chan_idx, FDdm
 
     if (mode == FPl011_DMA_MODE_ONLY || mode == FPL011_FLOW_DMA_BOTH)
     {
+        printf("input:%d\r\n", tx_bytes);
         /* DDMA init */
         ddmac_config = *FDdmaLookupConfig(ddma_id);
         ddmac_config.irq_prority = IRQ_PRIORITY_VALUE_0;

doc/ChangeLog.md

@@ -1,5 +1,18 @@
 # Phytium Standalone SDK 2023-6-12 ChangeLog
 
+Change Log since 2023-6-12
+
+## example
+
+- modify uart ddma example
+- remove FDDMA_MAX_TRANSFER_LEN
+
+## drivers
+
+- remove FDDMA_MAX_TRANSFER_LEN
+
+# Phytium Standalone SDK 2023-6-12 ChangeLog
+
 Change Log since 2023-6-8
 
 ## drivers

doc/reference/driver/fddma.md

@@ -64,7 +64,6 @@ typedef struct
     uintptr ddr_addr;           /* DMA channel DDR address, could be source or destination */
     u32 dev_addr;               /* DMA channel Perpherial, could be source or destination */
     u32 trans_len;              /* DMA channel transfer length */
-#define FDDMA_MAX_TRANSFER_LEN      64 /* max bytes in transfer */
 #define FDDMA_MIN_TRANSFER_LEN      4  /* min bytes in transfer */
     u32 timeout;                /* timeout = 0 means no use DMA timeout */
 } FDdmaChanConfig;  /* DDMA channel instance */

drivers/dma/fddma/fddma.c

@@ -191,8 +191,7 @@ FError FDdmaAllocateChan(FDdma *const instance, FDdmaChan *const dma_chan, const
         return FDDMA_ERR_INVALID_DDR_ADDR;
     }
 
-    if ((FDDMA_MAX_TRANSFER_LEN < dma_chan_config->trans_len) ||
-        (FDDMA_MIN_TRANSFER_LEN > dma_chan_config->trans_len) ||
+    if ((FDDMA_MIN_TRANSFER_LEN > dma_chan_config->trans_len) ||
         (0 != dma_chan_config->trans_len % FDDMA_MIN_TRANSFER_LEN))
     {
         FDDMA_ERROR("Invalid transfer size %d bytes !!!", dma_chan_config->trans_len);

drivers/dma/fddma/fddma.h

@@ -94,7 +94,6 @@ typedef struct
     uintptr ddr_addr;           /* DMA channel DDR address, could be source or destination */
     u32 dev_addr;               /* DMA channel Perpherial, could be source or destination */
     u32 trans_len;              /* DMA channel transfer length */
-#define FDDMA_MAX_TRANSFER_LEN      64 /* max bytes in transfer */
 #define FDDMA_MIN_TRANSFER_LEN      4  /* min bytes in transfer */
     u32 timeout;                /* timeout = 0 means no use DMA timeout */
 } FDdmaChanConfig;  /* DDMA channel instance */

example/adc/configs/e2000s_aarch32_eg_configs

@@ -1,170 +0,0 @@
-
-#
-# Project Configuration
-#
-CONFIG_TARGET_NAME="e2000s_baremetal_a32"
-# end of Project Configuration
-
-CONFIG_USE_BAREMETAL=y
-
-#
-# Platform Setting
-#
-
-#
-# Arch Configuration
-#
-CONFIG_TARGET_ARMV8_AARCH32=y
-# CONFIG_TARGET_ARMV8_AARCH64 is not set
-CONFIG_USE_CACHE=y
-CONFIG_USE_MMU=y
-# CONFIG_USE_SYS_TICK is not set
-CONFIG_USE_AARCH64_L1_TO_AARCH32=y
-# CONFIG_BOOT_WITH_FLUSH_CACHE is not set
-# end of Arch Configuration
-
-#
-# Board Configuration
-#
-# CONFIG_TARGET_F2000_4 is not set
-# CONFIG_TARGET_D2000 is not set
-# CONFIG_TARGET_E2000Q is not set
-# CONFIG_TARGET_E2000D is not set
-CONFIG_TARGET_E2000S=y
-CONFIG_TARGET_E2000=y
-CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
-# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set
-# CONFIG_DEFAULT_DEBUG_PRINT_UART2 is not set
-# end of Board Configuration
-
-#
-# Components Configuration
-#
-# CONFIG_USE_SPI is not set
-# CONFIG_USE_QSPI is not set
-CONFIG_USE_GIC=y
-CONFIG_ENABLE_GICV3=y
-# CONFIG_USE_SERIAL is not set
-# CONFIG_USE_GPIO is not set
-# CONFIG_USE_ETH is not set
-# CONFIG_USE_CAN is not set
-# CONFIG_USE_I2C is not set
-# CONFIG_USE_TIMER is not set
-# CONFIG_USE_MIO is not set
-# CONFIG_USE_SDMMC is not set
-# CONFIG_USE_PCIE is not set
-# CONFIG_USE_WDT is not set
-# CONFIG_USE_DMA is not set
-# CONFIG_USE_NAND is not set
-# CONFIG_USE_RTC is not set
-# CONFIG_USE_SATA is not set
-# CONFIG_USE_USB is not set
-CONFIG_USE_ADC=y
-
-#
-# ADC Configuration
-#
-CONFIG_USE_FADC=y
-# end of ADC Configuration
-
-# CONFIG_USE_PWM is not set
-# CONFIG_USE_IPC is not set
-# CONFIG_USE_MEDIA is not set
-# CONFIG_USE_SCMI_MHU is not set
-# end of Components Configuration
-# end of Platform Setting
-
-#
-# Building Option
-#
-# CONFIG_LOG_VERBOS is not set
-# CONFIG_LOG_DEBUG is not set
-# CONFIG_LOG_INFO is not set
-# CONFIG_LOG_WARN is not set
-CONFIG_LOG_ERROR=y
-# CONFIG_LOG_NONE is not set
-CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
-CONFIG_INTERRUPT_ROLE_MASTER=y
-# CONFIG_INTERRUPT_ROLE_SLAVE is not set
-# CONFIG_LOG_EXTRA_INFO is not set
-# CONFIG_LOG_DISPALY_CORE_NUM is not set
-# CONFIG_BOOTUP_DEBUG_PRINTS is not set
-
-#
-# Linker Options
-#
-CONFIG_AARCH32_RAM_LD=y
-# CONFIG_AARCH64_RAM_LD is not set
-# CONFIG_USER_DEFINED_LD is not set
-CONFIG_LINK_SCRIPT_ROM=y
-CONFIG_ROM_START_UP_ADDR=0x80100000
-CONFIG_ROM_SIZE_MB=1
-CONFIG_LINK_SCRIPT_RAM=y
-CONFIG_RAM_START_UP_ADDR=0x81000000
-CONFIG_RAM_SIZE_MB=64
-CONFIG_HEAP_SIZE=2
-CONFIG_SVC_STACK_SIZE=0x1000
-CONFIG_SYS_STACK_SIZE=0x1000
-CONFIG_IRQ_STACK_SIZE=0x1000
-CONFIG_ABORT_STACK_SIZE=0x1000
-CONFIG_FIQ_STACK_SIZE=0x1000
-CONFIG_UNDEF_STACK_SIZE=0x1000
-# end of Linker Options
-
-#
-# Compiler Options
-#
-
-#
-# Cross-Compiler Setting
-#
-CONFIG_GCC_OPTIMIZE_LEVEL=0
-# CONFIG_USE_EXT_COMPILER is not set
-# CONFIG_USE_KLIN_SYS is not set
-# end of Cross-Compiler Setting
-
-CONFIG_OUTPUT_BINARY=y
-# end of Compiler Options
-# end of Building Option
-
-#
-# Library Configuration
-#
-CONFIG_USE_NEW_LIBC=y
-# end of Library Configuration
-
-#
-# Third-Party Configuration
-#
-# CONFIG_USE_LWIP is not set
-# CONFIG_USE_LETTER_SHELL is not set
-# CONFIG_USE_AMP is not set
-# CONFIG_USE_SDMMC_CMD is not set
-# CONFIG_USE_YMODEM is not set
-# CONFIG_USE_SFUD is not set
-CONFIG_USE_BACKTRACE=y
-# CONFIG_USE_FATFS_0_1_4 is not set
-CONFIG_USE_TLSF=y
-# CONFIG_USE_SPIFFS is not set
-# CONFIG_USE_LITTLE_FS is not set
-# CONFIG_USE_LVGL is not set
-# CONFIG_USE_FREEMODBUS is not set
-# end of Third-Party Configuration
-
-#
-# PC Console Configuration
-#
-CONFIG_CONSOLE_PORT="/dev/ttyS3"
-CONFIG_CONSOLE_YMODEM_RECV_DEST="./"
-CONFIG_CONSOLE_BAUD_115200B=y
-# CONFIG_CONSOLE_BAUD_230400B is not set
-# CONFIG_CONSOLE_BAUD_921600B is not set
-# CONFIG_CONSOLE_BAUD_2MB is not set
-# CONFIG_CONSOLE_BAUD_OTHER is not set
-CONFIG_CONSOLE_BAUD_OTHER_VAL=115200
-CONFIG_CONSOLE_BAUD=115200
-# CONFIG_CONSOLE_UPLOAD_TFTP is not set
-CONFIG_CONSOLE_UPLOAD_YMODEM=y
-CONFIG_CONSOLE_UPLOAD_DIR="/mnt/d/tftboot"
-CONFIG_CONSOLE_UPLOAD_IMAGE_NAME="baremetal"
-# end of PC Console Configuration

example/adc/configs/e2000s_aarch64_eg_configs

@@ -1,166 +0,0 @@
-
-#
-# Project Configuration
-#
-CONFIG_TARGET_NAME="e2000s_baremetal_a64"
-# end of Project Configuration
-
-CONFIG_USE_BAREMETAL=y
-
-#
-# Platform Setting
-#
-
-#
-# Arch Configuration
-#
-# CONFIG_TARGET_ARMV8_AARCH32 is not set
-CONFIG_TARGET_ARMV8_AARCH64=y
-CONFIG_USE_CACHE=y
-CONFIG_USE_MMU=y
-# CONFIG_USE_SYS_TICK is not set
-# CONFIG_MMU_DEBUG_PRINTS is not set
-# CONFIG_BOOT_WITH_FLUSH_CACHE is not set
-# end of Arch Configuration
-
-#
-# Board Configuration
-#
-# CONFIG_TARGET_F2000_4 is not set
-# CONFIG_TARGET_D2000 is not set
-# CONFIG_TARGET_E2000Q is not set
-# CONFIG_TARGET_E2000D is not set
-CONFIG_TARGET_E2000S=y
-CONFIG_TARGET_E2000=y
-CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
-# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set
-# CONFIG_DEFAULT_DEBUG_PRINT_UART2 is not set
-# end of Board Configuration
-
-#
-# Components Configuration
-#
-# CONFIG_USE_SPI is not set
-# CONFIG_USE_QSPI is not set
-CONFIG_USE_GIC=y
-CONFIG_ENABLE_GICV3=y
-# CONFIG_USE_SERIAL is not set
-# CONFIG_USE_GPIO is not set
-# CONFIG_USE_ETH is not set
-# CONFIG_USE_CAN is not set
-# CONFIG_USE_I2C is not set
-# CONFIG_USE_TIMER is not set
-# CONFIG_USE_MIO is not set
-# CONFIG_USE_SDMMC is not set
-# CONFIG_USE_PCIE is not set
-# CONFIG_USE_WDT is not set
-# CONFIG_USE_DMA is not set
-# CONFIG_USE_NAND is not set
-# CONFIG_USE_RTC is not set
-# CONFIG_USE_SATA is not set
-# CONFIG_USE_USB is not set
-CONFIG_USE_ADC=y
-
-#
-# ADC Configuration
-#
-CONFIG_USE_FADC=y
-# end of ADC Configuration
-
-# CONFIG_USE_PWM is not set
-# CONFIG_USE_IPC is not set
-# CONFIG_USE_MEDIA is not set
-# CONFIG_USE_SCMI_MHU is not set
-# end of Components Configuration
-# end of Platform Setting
-
-#
-# Building Option
-#
-# CONFIG_LOG_VERBOS is not set
-# CONFIG_LOG_DEBUG is not set
-# CONFIG_LOG_INFO is not set
-# CONFIG_LOG_WARN is not set
-CONFIG_LOG_ERROR=y
-# CONFIG_LOG_NONE is not set
-CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
-CONFIG_INTERRUPT_ROLE_MASTER=y
-# CONFIG_INTERRUPT_ROLE_SLAVE is not set
-# CONFIG_LOG_EXTRA_INFO is not set
-# CONFIG_LOG_DISPALY_CORE_NUM is not set
-# CONFIG_BOOTUP_DEBUG_PRINTS is not set
-
-#
-# Linker Options
-#
-# CONFIG_AARCH32_RAM_LD is not set
-CONFIG_AARCH64_RAM_LD=y
-# CONFIG_USER_DEFINED_LD is not set
-CONFIG_LINK_SCRIPT_ROM=y
-CONFIG_ROM_START_UP_ADDR=0x80100000
-CONFIG_ROM_SIZE_MB=1
-CONFIG_LINK_SCRIPT_RAM=y
-CONFIG_RAM_START_UP_ADDR=0x81000000
-CONFIG_RAM_SIZE_MB=64
-CONFIG_HEAP_SIZE=2
-CONFIG_STACK_SIZE=0x400
-CONFIG_FPU_STACK_SIZE=0x1000
-# end of Linker Options
-
-#
-# Compiler Options
-#
-
-#
-# Cross-Compiler Setting
-#
-CONFIG_GCC_OPTIMIZE_LEVEL=0
-# CONFIG_USE_EXT_COMPILER is not set
-# CONFIG_USE_KLIN_SYS is not set
-# end of Cross-Compiler Setting
-
-CONFIG_OUTPUT_BINARY=y
-# end of Compiler Options
-# end of Building Option
-
-#
-# Library Configuration
-#
-CONFIG_USE_NEW_LIBC=y
-# end of Library Configuration
-
-#
-# Third-Party Configuration
-#
-# CONFIG_USE_LWIP is not set
-# CONFIG_USE_LETTER_SHELL is not set
-# CONFIG_USE_AMP is not set
-# CONFIG_USE_SDMMC_CMD is not set
-# CONFIG_USE_YMODEM is not set
-# CONFIG_USE_SFUD is not set
-CONFIG_USE_BACKTRACE=y
-# CONFIG_USE_FATFS_0_1_4 is not set
-CONFIG_USE_TLSF=y
-# CONFIG_USE_SPIFFS is not set
-# CONFIG_USE_LITTLE_FS is not set
-# CONFIG_USE_LVGL is not set
-# CONFIG_USE_FREEMODBUS is not set
-# end of Third-Party Configuration
-
-#
-# PC Console Configuration
-#
-CONFIG_CONSOLE_PORT="/dev/ttyS3"
-CONFIG_CONSOLE_YMODEM_RECV_DEST="./"
-CONFIG_CONSOLE_BAUD_115200B=y
-# CONFIG_CONSOLE_BAUD_230400B is not set
-# CONFIG_CONSOLE_BAUD_921600B is not set
-# CONFIG_CONSOLE_BAUD_2MB is not set
-# CONFIG_CONSOLE_BAUD_OTHER is not set
-CONFIG_CONSOLE_BAUD_OTHER_VAL=115200
-CONFIG_CONSOLE_BAUD=115200
-# CONFIG_CONSOLE_UPLOAD_TFTP is not set
-CONFIG_CONSOLE_UPLOAD_YMODEM=y
-CONFIG_CONSOLE_UPLOAD_DIR="/mnt/d/tftboot"
-CONFIG_CONSOLE_UPLOAD_IMAGE_NAME="baremetal"
-# end of PC Console Configuration

third-party/lvgl-8.3/port/timer.c

@@ -1,89 +0,0 @@
-/*
- * Copyright : (C) 2022 Phytium Information Technology, Inc.
- * All Rights Reserved.
- *
- * This program is OPEN SOURCE software: you can redistribute it and/or modify it
- * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
- * either version 1.0 of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
- * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the Phytium Public License for more details.
- *
- *
- * FilePath: timer.c
- * Date: 2022-08-23 09:17:20
- * LastEditTime: 2022-08-23 09:17:20
- * Description:  This file is for provide the timer for test
- *
- * Modify History:
- *  Ver   Who        Date         Changes
- * ----- ------  -------- --------------------------------------
- *  1.0  Wangzq     2022/12/20  Modify the format and establish the version
- */
-
-/***************************** Include Files *********************************/
-
-#include "fgeneric_timer.h"
-#include "finterrupt.h"
-#include "ftypes.h"
-#include "fparameters.h"
-#include "lv_port_disp.h"
-
-/************************** Variable Definitions *****************************/
-#ifdef __aarch64__
-    volatile u64 timer_hz = 1000;
-#else
-    volatile u32 timer_hz = 1000;
-#endif
-
-/************************** Function Prototypes ******************************/
-static void GenericTimerIrq(s32 vector, void *param)
-{
-
-    lv_tick_inc(1);
-    GenericTimerCompare(GenericTimerFrequecy() / timer_hz);
-}
-
-static void TimerSetup(void)
-{
-    u32 cntFrq;
-
-    /* disable timer and get system frequency */
-    GenericTimerStop();
-    cntFrq = GenericTimerFrequecy();
-
-    /* set tick rate */
-    GenericTimerCompare(cntFrq / timer_hz);
-    GenericTimerInterruptEnable();
-}
-
-static void TimerSetupInterrupts(void)
-{
-    /* set generic timer intrrupt */
-    InterruptSetPriority(GENERIC_TIMER_NS_IRQ_NUM, 0);
-
-    /* install tick handler */
-    InterruptInstall(GENERIC_TIMER_NS_IRQ_NUM, GenericTimerIrq,
-                     (void *)timer_hz, "GenericTimerTick");
-}
-
-void TimerInit(void)
-{
-    TimerSetup();
-    TimerSetupInterrupts();
-}
-
-void TimerEnable(void)
-{
-    /* enable intrrupt */
-    InterruptUmask(GENERIC_TIMER_NS_IRQ_NUM);
-    GenericTimerStart();
-}
-
-void TimerDisable(void)
-{
-    /* enable intrrupt */
-    InterruptMask(GENERIC_TIMER_NS_IRQ_NUM);
-    GenericTimerStop();
-}

third-party/openamp/ports/rpmsg-echo.h

@@ -1,19 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef RPMSG_ECHO_H
-#define RPMSG_ECHO_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#define RPMSG_SERVICE_NAME         "rpmsg-openamp-demo-channel"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* RPMSG_ECHO_H */