Browse Source

!23 wdt功能合入

* wdt modify
pull/24/MERGE
王晓东1030 3 years ago
parent
commit
67f1d13784
  1. 2
      README.md
  2. 13
      baremetal/example/wdt_test/Kconfig
  3. 21
      baremetal/example/wdt_test/Makefile
  4. 108
      baremetal/example/wdt_test/README.md
  5. 104
      baremetal/example/wdt_test/main.c
  6. BIN
      baremetal/example/wdt_test/pic/wdt_fresh.png
  7. BIN
      baremetal/example/wdt_test/pic/wdt_nofresh.png
  8. 109
      baremetal/example/wdt_test/sdkconfig
  9. 99
      baremetal/example/wdt_test/sdkconfig.h
  10. 20
      board/d2000/parameters.h
  11. 21
      board/e2000/parameters.h
  12. 19
      board/ft2004/parameters.h
  13. 2
      common/ft_error_code.h
  14. 12
      doc/ChangeLog.md
  15. 12
      drivers/Kconfig
  16. 8
      drivers/watchdog/Kconfig
  17. 158
      drivers/watchdog/fwdt/fwdt.c
  18. 74
      drivers/watchdog/fwdt/fwdt.h
  19. 60
      drivers/watchdog/fwdt/fwdt_g.c
  20. 106
      drivers/watchdog/fwdt/fwdt_hw.h
  21. 21
      drivers/watchdog/fwdt/fwdt_intr.c
  22. 1
      phytium-standalone-sdk
  23. 7
      standalone.mk

2
README.md

@ -343,7 +343,7 @@ D2000 是一款面向桌面应用的高性能通用 8 核处理器。每 2 个
| SDCI | FT2000/4<br>D2000 | E2000 | sdmmc/f_sdci |
| PCIE | FT2000/4 | E2000<br>D2000 | pcie/fpcie |
| GDMA | E2000 | | driver/gdma |
| WDT | FT2000/4<br>D2000<br>E2000 | | driver/watchdog |
| Third-Party | Platform Supported | Platform Developing | Component |
| ------------------------------ | -------------------------- | ------------------- | -------------------- |

13
baremetal/example/wdt_test/Kconfig

@ -0,0 +1,13 @@
mainmenu "Phytium Baremetal Configuration"
menu "Project Configuration"
config TARGET_NAME
string "Build Target Name"
default "baremetal"
help
Build Target name for the demo
endmenu
source "$(STANDALONE_SDK_ROOT)/Kconfig"

21
baremetal/example/wdt_test/Makefile

@ -0,0 +1,21 @@
# 指定工程项目根目录为当前(只能指定一个目录)
export PROJECT_DIR ?= .
# 用户添加的源文件夹和头文件夹(可以指定多个)
export USR_SRC_DIR ?= . \
./src
export USR_INC_DIR ?= . \
./inc
# 用户定义的编译目标文件上传路径
USR_BOOT_DIR ?= /mnt/d/tftboot/
# 设置启动镜像名
BOOT_IMG_NAME ?= baremetal
# 指定编译freertos项目使用的makefile
include $(STANDALONE_SDK_ROOT)/make/build_baremetal.mk
# 完成编译
boot:
make
cp ./$(CONFIG_TARGET_NAME).elf $(USR_BOOT_DIR)/$(BOOT_IMG_NAME).elf

108
baremetal/example/wdt_test/README.md

@ -0,0 +1,108 @@
<!--
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-09-06 10:37:27
* @LastEditTime: 2021-09-06 14:34:57
* @Description:  This files is for
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
-->
# watchdog timer
## 1. 例程介绍
本例程示范了baremetal环境中的看门狗功能使用。
本例程目前支持的demo包括使用中断喂狗和不使用中断喂狗两种。
## 2. 如何使用例程
本例程需要用到
- Phytium开发板(FT2000-4/D2000)
- [Phytium Standalone SDK](https://gitee.com/phytium_embedded/phytium-standalone-sdk)
### 2.1 硬件配置方法
本例程支持的硬件平台包括
- FT2000-4
- D2000
对应的配置项是,
- CONFIG_TARGET_F2000_4
- CONFIG_TARGET_D2000
### 2.2 SDK配置方法
本例程需要,
- 使能FWDT
对应的配置项是,
- Use FWDT
### 2.3 构建和下载
#### 2.3.1 构建过程
- 在host侧完成配置
>配置成D2000,对于其它平台,使用对于的默认配置,如FT2000-4 `make config_ft2004_configs`
```
$ make config_d2000_configs
$ make menuconfig
```
- 在host侧完成构建
```
$ make
```
#### 2.3.2 下载过程
- host侧设置重启host侧tftp服务器
```
sudo service tftpd-hpa restart
```
- 开发板侧使用bootelf命令跳转
```
setenv ipaddr 192.168.4.20
setenv serverip 192.168.4.50
setenv gatewayip 192.168.4.1
tftpboot 0x90100000 baremetal.elf
bootelf -p 0x90100000
```
### 2.4 输出与实验现象
- 启动进入wdt测试,分为定时器喂狗和不喂狗。
#### 2.4.1 启用定时器喂狗
- 配置看门狗定时器中断,设置6s喂狗一次。
![定时器喂狗](./pic/wdt_fresh.png "wdt_fresh.png")
#### 2.4.2 不喂狗
- 不配置看门狗定时器中断,设置超时时间为6s,两次超时(12s)后系统复位。
![不喂狗](./pic/wdt_nofresh.png "wdt_nofresh.png")
## 3. 如何解决问题
Q: 看门狗复位时间
A: FWdtSetTimeout设置的时间为看门狗定时器的超时时间,两次超时后系统复位。
## 4. 修改历史记录
v0.1.1 初次合入watchdog timer

104
baremetal/example/wdt_test/main.c

@ -0,0 +1,104 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-07-09 08:08:39
* @LastEditTime: 2021-07-09 13:55:27
* @Description:  This files is for
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
*/
#include <stdio.h>
#include <fsleep.h>
#include <generic_timer.h>
#include "interrupt.h"
#include "gicv3.h"
#include "parameters.h"
#include "fwdt.h"
#include "fwdt_hw.h"
FWdtCtrl wdt_ctrl;
/* wdt num: 0 or 1 */
u8 wdt_id = 0;
/**
* @name: WdtInterrupt
* @msg: This function handle wdt timeout interrupt, use it to refresh wdt.
* @return {void}
* @param {s32} vector, the interrupt number
* @param {void} *param, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
void FWdtInterrupt(s32 vector, void *param)
{
FWdtRefresh((FWdtCtrl *)param);
printf("wdt refresh.\n");
}
/**
* @name: WdtRefreshTest
* @msg: Set wdt interrupt to refresh wdt, set timeout value, start wdt.
* @return {void}
* @param {WdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
void FWdtRefreshTest(FWdtCtrl *pctrl)
{
FWdtConfig *pconfig = &pctrl->config;
/* interrupt init */
InterruptSetPriority(pconfig->irq_num, pconfig->irq_prority);
InterruptInstall(pconfig->irq_num, FWdtInterrupt, (void*)pctrl, pconfig->instance_name);
InterruptUmask(pconfig->irq_num);
FWdtSetTimeout(pctrl, 6);
FWdtStart(pctrl);
}
/**
* @name: WdtNoRefreshTest
* @msg: Set wdt timeout value, start wdt, no refresh.
* @return {void}
* @param {WdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
void FWdtNoRefreshTest(FWdtCtrl *pctrl)
{
FWdtConfig *pconfig = &pctrl->config;
FWdtSetTimeout(pctrl, 6);
FWdtStart(pctrl);
}
int main()
{
u32 count = 0;
printf("ft wdt test.\n");
FWdtCtrl *pctrl = &wdt_ctrl;
pctrl->config = *FWdtLookupConfig(wdt_id);
FWdtRefreshTest(pctrl);
while(1){
printf("wcvh=%#x, wcvl=%#x, tick=%#x, wor=%#x\n", FWdtReadWCVH(pctrl),\
FWdtReadWCVL(pctrl), GenericTimerRead(), FWdtReadWOR(pctrl));
printf("timeleft=%d, wcs=%#x, count=%d\n", FWdtGetTimeleft(pctrl), FWdtReadWCS(pctrl), count);
fsleep_millisec(1000);
count++;
};
return 0;
}

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109
baremetal/example/wdt_test/sdkconfig

@ -0,0 +1,109 @@
#
# Project Configuration
#
CONFIG_TARGET_NAME="ft2004_baremetal_a64"
# end of Project Configuration
#
# Board Setting
#
#
# Arch Configuration
#
# CONFIG_TARGET_ARMV8_AARCH32 is not set
CONFIG_TARGET_ARMV8_AARCH64=y
# CONFIG_TARGET_ARMV7 is not set
CONFIG_USE_CACHE=y
CONFIG_USE_L3CACHE=y
CONFIG_USE_MMU=y
# CONFIG_USE_SYS_TICK is not set
# end of Arch Configuration
#
# Board Configuration
#
CONFIG_TARGET_F2000_4=y
# CONFIG_TARGET_E2000 is not set
# CONFIG_TARGET_D2000 is not set
# end of Board Configuration
#
# Components Configuration
#
# CONFIG_USE_SPI is not set
# CONFIG_USE_QSPI is not set
CONFIG_USE_GIC=y
CONFIG_EBABLE_GICV3=y
# CONFIG_USE_USART is not set
# CONFIG_USE_GPIO is not set
# CONFIG_USE_IOMUX is not set
# CONFIG_USE_ETH is not set
# CONFIG_USE_CAN is not set
# CONFIG_USE_I2C is not set
# CONFIG_USE_TIMER is not set
# CONFIG_USE_SDMMC is not set
# CONFIG_USE_PCIE is not set
CONFIG_USE_WDT=y
#
# FWDT Configuration
#
CONFIG_ENABLE_FWDT=y
# end of FWDT Configuration
# CONFIG_USE_DMA is not set
# end of Components Configuration
# end of Board Setting
#
# Building Option
#
CONFIG_ENVI_UBUNTU_20_04=y
#
# Cross-Compiler Setting
#
CONFIG_COMPILER_NO_STD_STARUP=y
# CONFIG_USE_EXT_COMPILER is not set
# end of Cross-Compiler Setting
# CONFIG_LOG_VERBOS is not set
# CONFIG_LOG_DEBUG is not set
# CONFIG_LOG_INFO is not set
# CONFIG_LOG_WARN is not set
CONFIG_LOG_ERROR=y
# CONFIG_LOG_NONE is not set
#
# Linker Options
#
# CONFIG_AARCH32_RAM_LD is not set
CONFIG_AARCH64_RAM_LD=y
# CONFIG_QEMU_AARCH32_RAM_LD is not set
# CONFIG_USER_DEFINED_LD is not set
CONFIG_LINK_SCRIPT_ROM=y
CONFIG_ROM_START_UP_ADDR=0x80100000
CONFIG_ROM_SIZE_MB=1
CONFIG_LINK_SCRIPT_RAM=y
CONFIG_RAM_START_UP_ADDR=0x81000000
CONFIG_RAM_SIZE_MB=64
CONFIG_HEAP_SIZE=0x0400
CONFIG_STACK_TOP_ADDR=0x82000000
# end of Linker Options
# end of Building Option
#
# Library Configuration
#
CONFIG_USE_LIBC=y
# end of Library Configuration
#
# Third-Party Configuration
#
# CONFIG_USE_LWIP is not set
# CONFIG_USE_LETTER_SHELL is not set
# CONFIG_USE_AMP is not set
# end of Third-Party Configuration

99
baremetal/example/wdt_test/sdkconfig.h

@ -0,0 +1,99 @@
#ifndef SDK_CONFIG_H__
#define SDK_CONFIG_H__
/* Project Configuration */
#define CONFIG_TARGET_NAME "ft2004_baremetal_a64"
/* end of Project Configuration */
/* Board Setting */
/* Arch Configuration */
/* CONFIG_TARGET_ARMV8_AARCH32 is not set */
#define CONFIG_TARGET_ARMV8_AARCH64
/* CONFIG_TARGET_ARMV7 is not set */
#define CONFIG_USE_CACHE
#define CONFIG_USE_L3CACHE
#define CONFIG_USE_MMU
/* CONFIG_USE_SYS_TICK is not set */
/* end of Arch Configuration */
/* Board Configuration */
#define CONFIG_TARGET_F2000_4
/* CONFIG_TARGET_E2000 is not set */
/* CONFIG_TARGET_D2000 is not set */
/* end of Board Configuration */
/* Components Configuration */
/* CONFIG_USE_SPI is not set */
/* CONFIG_USE_QSPI is not set */
#define CONFIG_USE_GIC
#define CONFIG_EBABLE_GICV3
/* CONFIG_USE_USART is not set */
/* CONFIG_USE_GPIO is not set */
/* CONFIG_USE_IOMUX is not set */
/* CONFIG_USE_ETH is not set */
/* CONFIG_USE_CAN is not set */
/* CONFIG_USE_I2C is not set */
/* CONFIG_USE_TIMER is not set */
/* CONFIG_USE_SDMMC is not set */
/* CONFIG_USE_PCIE is not set */
#define CONFIG_USE_WDT
/* FWDT Configuration */
#define CONFIG_ENABLE_FWDT
/* end of FWDT Configuration */
/* CONFIG_USE_DMA is not set */
/* end of Components Configuration */
/* end of Board Setting */
/* Building Option */
#define CONFIG_ENVI_UBUNTU_20_04
/* Cross-Compiler Setting */
#define CONFIG_COMPILER_NO_STD_STARUP
/* CONFIG_USE_EXT_COMPILER is not set */
/* end of Cross-Compiler Setting */
/* CONFIG_LOG_VERBOS is not set */
/* CONFIG_LOG_DEBUG is not set */
/* CONFIG_LOG_INFO is not set */
/* CONFIG_LOG_WARN is not set */
#define CONFIG_LOG_ERROR
/* CONFIG_LOG_NONE is not set */
/* Linker Options */
/* CONFIG_AARCH32_RAM_LD is not set */
#define CONFIG_AARCH64_RAM_LD
/* CONFIG_QEMU_AARCH32_RAM_LD is not set */
/* CONFIG_USER_DEFINED_LD is not set */
#define CONFIG_LINK_SCRIPT_ROM
#define CONFIG_ROM_START_UP_ADDR 0x80100000
#define CONFIG_ROM_SIZE_MB 1
#define CONFIG_LINK_SCRIPT_RAM
#define CONFIG_RAM_START_UP_ADDR 0x81000000
#define CONFIG_RAM_SIZE_MB 64
#define CONFIG_HEAP_SIZE 0x0400
#define CONFIG_STACK_TOP_ADDR 0x82000000
/* end of Linker Options */
/* end of Building Option */
/* Library Configuration */
#define CONFIG_USE_LIBC
/* end of Library Configuration */
/* Third-Party Configuration */
/* CONFIG_USE_LWIP is not set */
/* CONFIG_USE_LETTER_SHELL is not set */
/* CONFIG_USE_AMP is not set */
/* end of Third-Party Configuration */
#endif

20
board/d2000/parameters.h

@ -285,6 +285,26 @@ extern "C"
#define I2C_REF_CLK_HZ 48000000 /* 48MHz */
/* WDT */
typedef enum
{
WDT_INSTANCE_0 = 0,
WDT_INSTANCE_1,
WDT_INSTANCE_NUM
} WdtInstance;
#define WDT0_REFRESH_BASE 0x2800a000
#define WDT0_CONTROL_BASE 0x2800b000
#define WDT1_REFRESH_BASE 0x28016000
#define WDT1_CONTROL_BASE 0x28017000
#define WDT0_INTR_IRQ 48
#define WDT1_INTR_IRQ 49
#define WDT_CLK 48000000 /* 48MHz */
/* SDCI */
enum
{

21
board/e2000/parameters.h

@ -79,7 +79,6 @@ extern "C"
/****** GIC v3 *****/
#define FT_GICV3_INSTANCES_NUM 1U
#define GICV3_REG_LENGTH 0x00009000
#define GICV3_RD_OFFSET (2U<<16)
/*
* The maximum priority value that can be used in the GIC.
@ -370,6 +369,26 @@ extern "C"
#define FT_CAN_USE_CANFD 1
#define FT_CPUS_NR 4
/* WDT */
typedef enum
{
WDT_INSTANCE_0 = 0,
WDT_INSTANCE_1,
WDT_INSTANCE_NUM
} WdtInstance;
#define WDT0_REFRESH_BASE 0x28040000
#define WDT0_CONTROL_BASE 0x28041000
#define WDT1_REFRESH_BASE 0x28042000
#define WDT1_CONTROL_BASE 0x28043000
#define WDT0_INTR_IRQ 196
#define WDT1_INTR_IRQ 197
#define WDT_CLK 48000000 /* 48MHz */
#ifdef __cplusplus
}

19
board/ft2004/parameters.h

@ -309,6 +309,25 @@ extern "C"
#define I2C_REF_CLK_HZ 48000000 /* 48MHz */
/* WDT */
typedef enum
{
WDT_INSTANCE_0 = 0,
WDT_INSTANCE_1,
WDT_INSTANCE_NUM
} WdtInstance;
#define WDT0_REFRESH_BASE 0x2800a000
#define WDT0_CONTROL_BASE 0x2800b000
#define WDT1_REFRESH_BASE 0x28016000
#define WDT1_CONTROL_BASE 0x28017000
#define WDT0_INTR_IRQ 48
#define WDT1_INTR_IRQ 49
#define WDT_CLK 48000000 /* 48MHz */
/* SDCI */
typedef enum
{

2
common/ft_error_code.h

@ -50,6 +50,8 @@ typedef enum
ErrBspI2c,
ErrBspSdci,
ErrBspMci,
ErrBspWdt,
ErrGdma,
ErrBspModMaxMask = 255

12
doc/ChangeLog.md

@ -11,6 +11,17 @@
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
-->
# Phytium Standalone SDK v0.1.1 ChangeLog
Change Log since v0.1.0
## drivers
- support watchdog timer
## baremetal/example
- add wdt_test example
# Phytium Standalone SDK v0.1.0 ChangeLog
@ -19,6 +30,7 @@ Change Log since v0.0.11
## drivers
- support gicv3 init with multiple cores
- support watchdog timer
## baremetal/example

12
drivers/Kconfig

@ -133,6 +133,18 @@ config USE_PCIE
source "$(STANDALONE_DIR)/drivers/pcie/Kconfig"
endif
config USE_WDT
bool
prompt "Use WDT"
default n
help
Include watchdog timer modules and enable watchdog timer
if USE_WDT
source "$(STANDALONE_DIR)/drivers/watchdog/Kconfig"
endif
config USE_DMA
bool
prompt "Use DMA"

8
drivers/watchdog/Kconfig

@ -0,0 +1,8 @@
menu "FWDT Configuration"
config ENABLE_FWDT
bool
prompt "Use FWDT"
default n
endmenu

158
drivers/watchdog/fwdt/fwdt.c

@ -0,0 +1,158 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-07-25 13:47:51
* @LastEditTime: 2021-07-25 18:31:13
* @Description:  This files is for wdt ctrl function implementation
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 Wangxiaodong 2021/8/25 init
*/
#include <generic_timer.h>
#include <kernel.h>
#include "ft_types.h"
#include "ft_error_code.h"
#include "ft_debug.h"
#include "fwdt.h"
#include "fwdt_hw.h"
#include "parameters.h"
/* max timeout = 0xFFFFFFFF/ WDT_CLK = 89 */
#define FWDT_MAX_TIMEOUT 89
/**
* @name: WdtSetTimeout
* @msg: Set Timeout Value
* @return {u32} timeout set status, WDT_ERR_TIMEOUT or WDT_SUCCESS.
* @param {WdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
* @param {u32} timeout, represent in seconds, this parameter must be a number between 1 and 89.
*/
u32 FWdtSetTimeout(FWdtCtrl *pctrl, u32 timeout)
{
if (timeout > FWDT_MAX_TIMEOUT)
{
FWDT_ERROR("timeout value is invalid, default 1s \n");
return FWDT_ERR_TIMEOUT;
}
FWDT_SET_TIMEOUT(pctrl, timeout);
pctrl->is_ready = FT_COMPONENT_IS_READY;
return FWDT_SUCCESS;
}
/**
* @name: WdtGetTimeleft
* @msg: Get Timeout countdown, in seconds
* @return {u32} Timeout countdown, in seconds
* @param {WdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtGetTimeleft(FWdtCtrl *pctrl)
{
u64 timeleft = 0;
/* if the ws0 bit of register WCS is zero,indicates that there is one more timeout opportunity */
if(!(FWDT_READ_WCS(pctrl) & FWDT_SBSA_GWDT_WCS_WS0))
timeleft += FWDT_READ_WOR(pctrl);
timeleft += FWDT_READ_WCV(pctrl) - GenericTimerRead();
do_div(timeleft, WDT_CLK);
return timeleft;
}
/**
* @name: WdtRefresh
* @msg: Refresh watchdog
* @return {u32} status
* @param {*}
*/
u32 FWdtRefresh(FWdtCtrl *pctrl)
{
FWDT_REFRESH(pctrl, FWDT_REFRESH_VALUE);
return FWDT_SUCCESS;
}
/**
* @name: WdtStart
* @msg: Start watchdog
* @return {u32} status
* @param {*}
*/
u32 FWdtStart(FWdtCtrl *pctrl)
{
FWDT_START(pctrl, FWDT_SBSA_GWDT_WCS_EN);
return FWDT_SUCCESS;
}
/**
* @name: WdtStop
* @msg: Stop watchdog
* @return {u32} status
* @param {WdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtStop(FWdtCtrl *pctrl)
{
FWDT_STOP(pctrl, FWDT_STOP_VALUE);
return FWDT_SUCCESS;
}
/**
* @name: FWdtReadWCVH
* @msg: Read wdt wcvh register value. wcvl and wclh register stores the comparison value of the watchdog count.
* timeout value = comparison value - sys_cnt.
* @return {void}
* @param {FWdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtReadWCVH(FWdtCtrl *pctrl)
{
return FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WCVH);
}
/**
* @name: FWdtReadWCVL
* @msg: Read wdt wcvl register value. wcvl and wclh register stores the comparison value of the watchdog count.
* timeout value = comparison value - sys_cnt.
* @return {void}
* @param {FWdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtReadWCVL(FWdtCtrl *pctrl)
{
return FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WCVL);
}
/**
* @name: FWdtReadWOR
* @msg: Read wdt wor register value. used to set timeout value, wor + sys_cnt = wcv.
* @return {void}
* @param {FWdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtReadWOR(FWdtCtrl *pctrl)
{
return FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WOR);
}
/**
* @name: FWdtReadWCS
* @msg: Read wdt wcs register value. wcs is control and state register. bit0 enable(1) or disable(0) wdt.
* @return {void}
* @param {FWdtCtrl} *pctrl, pointer to a WdtCtrl structure that contains
* the configuration information for the specified wdt module.
*/
u32 FWdtReadWCS(FWdtCtrl *pctrl)
{
return FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WCS);
}

74
drivers/watchdog/fwdt/fwdt.h

@ -0,0 +1,74 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-08-25 10:27:00
* @LastEditTime: 2021-08-26 18:23:43
* @Description:  This files is for i2c ctrl function definition
*
* @Modify History:
* Ver   Who         Date         Changes
* ----- ------      --------    --------------------------------------
* 1.0 Wangxiaodong 2021/8/26 init
*/
#ifndef BSP_DRIVERS_FT_WDT_H
#define BSP_DRIVERS_FT_WDT_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "ft_types.h"
#include "ft_debug.h"
#include "ft_error_code.h"
#include "kernel.h"
typedef struct
{
u32 instance_id;/* wdt id */
u32 refresh_baseAddr;/* wdt更新寄存器基地址 */
u32 control_baseAddr;/* wdt控制寄存器基地址 */
u32 irq_num;/* wdt中断号 */
u32 irq_prority;/* wdt中断优先级 */
const char *instance_name;/* instance name */
}FWdtConfig;/* wdt配置 */
typedef struct
{
FWdtConfig config;/* wdt配置 */
u32 is_ready;/* wdt初始化完成标志 */
}FWdtCtrl;
#define FWDT_SUCCESS FT_SUCCESS
#define FWDT_ERR_INVAL_PARM FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(1))
#define FWDT_ERR_NOT_READY FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(2))
#define FWDT_ERR_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(3))
#define FWDT_ERR_NOT_SUPPORT FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(4))
#define FWDT_ERR_CMD_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(5))
#define FWDT_ERR_DMA_READ_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, BIT(6))
#define FWDT_DEBUG_TAG "WDT"
#define FWDT_ERROR(format, ...) FT_DEBUG_PRINT_E(FWDT_DEBUG_TAG, format, ##__VA_ARGS__)
#define FWDT_INFO(format, ...) FT_DEBUG_PRINT_I(FWDT_DEBUG_TAG, format, ##__VA_ARGS__)
#define FWDT_DEBUG(format, ...) FT_DEBUG_PRINT_D(FWDT_DEBUG_TAG, format, ##__VA_ARGS__)
const FWdtConfig *FWdtLookupConfig(u32 instanceId);
u32 FWdtSetTimeout(FWdtCtrl *pCtrl, u32 timeout);
u32 FWdtGetTimeleft(FWdtCtrl *pCtrl);
u32 FWdtRefresh(FWdtCtrl *pCtrl);
u32 FWdtStart(FWdtCtrl *pCtrl);
u32 FWdtStop(FWdtCtrl *pCtrl);
u32 FWdtReadWCVH(FWdtCtrl *pctrl);
u32 FWdtReadWCVL(FWdtCtrl *pctrl);
u32 FWdtReadWOR(FWdtCtrl *pctrl);
u32 FWdtReadWCS(FWdtCtrl *pctrl);
#ifdef __cplusplus
}
#endif
#endif

60
drivers/watchdog/fwdt/fwdt_g.c

@ -0,0 +1,60 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-08-25 13:28:18
* @LastEditTime: 2021-08-25 17:17:55
* @Description:  This files is for static config of wdt ctrl
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 Wangxiaodong 2021/8/25 init
*/
#include "parameters.h"
#include "fwdt.h"
/* default configs of wdt ctrl */
static const FWdtConfig FWdtConfigTbl[WDT_INSTANCE_NUM] =
{
{.instance_id = WDT_INSTANCE_0,
.refresh_baseAddr = WDT0_REFRESH_BASE,
.control_baseAddr = WDT0_CONTROL_BASE,
.irq_num = WDT0_INTR_IRQ,
.irq_prority = 0,
.instance_name = "WDT-0"
},
{
.instance_id = WDT_INSTANCE_1,
.refresh_baseAddr = WDT1_REFRESH_BASE,
.control_baseAddr = WDT1_CONTROL_BASE,
.irq_num = WDT1_INTR_IRQ,
.irq_prority = 0,
.instance_name = "WDT-1"
}
};
/**
* @name: WdtLookupConfig
* @msg: get wdt configs by id
* @return {*}
* @param {u32} instanceId, id of wdt ctrl
*/
const FWdtConfig *FWdtLookupConfig(u32 instance_id)
{
const FWdtConfig *pconfig = NULL;
u32 index;
for (index = 0; index < (u32)WDT_INSTANCE_NUM; index++)
{
if (FWdtConfigTbl[index].instance_id == instance_id)
{
pconfig = &FWdtConfigTbl[index];
break;
}
}
return (FWdtConfig *)pconfig;
}

106
drivers/watchdog/fwdt/fwdt_hw.h

@ -0,0 +1,106 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-08-25 10:27:42
* @LastEditTime: 2021-08-26 16:45:20
* @Description:  This files is for ctrl of watchdog timer functions
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 wangxiaodong 2021/8/25 init
*/
#ifndef BSP_DRIVERS_FT_WDT_HW_H
#define BSP_DRIVERS_FT_WDT_HW_H
#ifdef __cplusplus
extern "C"
{
#endif
#include "kernel.h"
#include "ft_types.h"
#include "ft_io.h"
/* SBSA Generic Watchdog register definitions */
/* refresh frame */
#define FWDT_SBSA_GWDT_WRR 0x000
/* control frame */
#define FWDT_SBSA_GWDT_WCS 0x000 /* WCS register */
#define FWDT_SBSA_GWDT_WOR 0x008
#define FWDT_SBSA_GWDT_WCVL 0x010
#define FWDT_SBSA_GWDT_WCVH 0x014
/* refresh/control frame */
#define FWDT_SBSA_GWDT_W_IIDR 0xfcc
#define FWDT_SBSA_GWDT_IDR 0xfd0
/* Watchdog Control and Status Register */
#define FWDT_SBSA_GWDT_WCS_EN BIT(0)
#define FWDT_SBSA_GWDT_WCS_WS0 BIT(1)
#define FWDT_SBSA_GWDT_WCS_WS1 BIT(2)
#define FWDT_REFRESH_VALUE 0
#define FWDT_STOP_VALUE 0
/***************** Macros (Inline Functions) Definitions *********************/
/* WDT Register Operations */
#define FWDT_REFRESH_ADDR(pctrl) ((pctrl)->config.refresh_baseAddr)
#define FWDT_CONTROL_ADDR(pctrl) ((pctrl)->config.control_baseAddr)
/**
* @name: WDT_READ_REG32
* @msg: WDT寄存器
* @param {u32} addr
* @param {u32} reg_offset
* @return {u32}
*/
#define FWDT_READ_REG32(addr, reg_offset) FtIn32(FWDT_CONTROL_ADDR(addr) + (u32)(reg_offset))
/**
* @name: WDT_READ_REG64
* @msg: WDT寄存器
* @param {u32} addr
* @param {u32} reg_offset
* @return {u64}
*/
#define FWDT_READ_REG64(addr, reg_offset) FtIn64(FWDT_CONTROL_ADDR(addr) + (u64)(reg_offset))
/**
* @name: WDT_WRITE_REG32
* @msg: WDT寄存器
* @param {u32} addr
* @param {u32} reg_offset
* @param {u32} reg_value
* @return {void}
*/
#define FWDT_WRITE_REG32(addr, reg_offset, reg_value) FtOut32(FWDT_CONTROL_ADDR(addr) + (u32)(reg_offset), (u32)(reg_value))
#define FWDT_WRITE_REFRESH_REG32(addr, reg_offset, reg_value) FtOut32(FWDT_REFRESH_ADDR(addr) + (u32)(reg_offset), (u32)(reg_value))
#define FWDT_START(pctrl, regVal) FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WCS, (regVal))
#define FWDT_STOP(pctrl, regVal) FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WCS, (regVal))
#define FWDT_REFRESH(pctrl, regVal) FWDT_WRITE_REFRESH_REG32(pctrl, FWDT_SBSA_GWDT_WRR, (regVal))
#define FWDT_SET_TIMEOUT(pctrl, regVal) FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WOR, (u32)((WDT_CLK) * (regVal)))
#define FWDT_READ_WCS(pctrl) FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WCS)
#define FWDT_READ_WOR(pctrl) FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WOR)
#define FWDT_READ_WCV(pctrl) FWDT_READ_REG64(pctrl, FWDT_SBSA_GWDT_WCVL)
#ifdef __cplusplus
}
#endif
#endif

21
drivers/watchdog/fwdt/fwdt_intr.c

@ -0,0 +1,21 @@
/*
* @ : Copyright (c) 2021 Phytium Information Technology, Inc.
*
* SPDX-License-Identifier: Apache-2.0.
*
* @Date: 2021-08-26 16:27:59
* @LastEditTime: 2021-08-26 16:42:41
* @Description:  This files is for intrrupt function of i2c ctrl
*
* @Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 Wangxiaodong 2021/8/3 init
*/
#include "parameters.h"
#include "ft_assert.h"
#include "fwdt.h"
#include "gicv3.h"
#include "interrupt.h"

1
phytium-standalone-sdk

@ -0,0 +1 @@
Subproject commit 521fdf6ef331a671926ffa7cd93ca82e32f39bdf

7
standalone.mk

@ -150,6 +150,13 @@ ifdef CONFIG_USE_F_MCI
INC_DIR += $(CUR_DIR)/drivers/sdmmc/f_mci
endif
#wdt
ifdef CONFIG_ENABLE_FWDT
SRC_DIR += $(CUR_DIR)/drivers/watchdog/fwdt
INC_DIR += $(CUR_DIR)/drivers/watchdog/fwdt
endif
# dma
ifdef CONFIG_ENABLE_F_GDMA

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