diff --git a/baremetal/example/aarch32_cache_mmu_wr/README.md b/baremetal/example/aarch32_cache_mmu_wr/README.md index 688a60641..aa80fea1e 100644 --- a/baremetal/example/aarch32_cache_mmu_wr/README.md +++ b/baremetal/example/aarch32_cache_mmu_wr/README.md @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0. * * @Date: 2021-06-23 18:47:28 - * @LastEditTime: 2021-06-23 18:48:31 + * @LastEditTime: 2021-07-06 13:35:16 * @Description:  This files is for * * @Modify History: @@ -33,7 +33,8 @@ setenv ipaddr 192.168.4.20 setenv serverip 192.168.4.50 setenv gatewayip 192.168.4.1 tftpboot 80100000 ft2004_baremetal.bin -bootvx32 +icache off +dcache off go 0x80100000 ``` diff --git a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig index e1be002c4..ff02ba1f3 100644 --- a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig +++ b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig @@ -53,10 +53,10 @@ CONFIG_E2000_FT2004_AARCH32_RAM_LD=y # Common Configuration # # CONFIG_LOG_VERBOS is not set -# CONFIG_LOG_DEBUG is not set +CONFIG_LOG_DEBUG=y # CONFIG_LOG_INFO is not set # CONFIG_LOG_WARN is not set -CONFIG_LOG_ERROR=y +# CONFIG_LOG_ERROR is not set # end of Common Configuration # diff --git a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.h b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.h index 183150605..bfe7e156a 100644 --- a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.h +++ b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.h @@ -4,7 +4,7 @@ #define CONFIG_ENVI_UBUNTU_20_04 1 #define CONFIG_COMPILER_NO_STD_STARUP 1 #define CONFIG_E2000_FT2004_AARCH32_RAM_LD 1 -#define CONFIG_LOG_ERROR 1 +#define CONFIG_LOG_DEBUG 1 #define CONFIG_USE_GIC 1 #define CONFIG_EBABLE_GICV3 1 #define CONFIG_USE_CACHE 1 diff --git a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.old b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.old index c0113ff86..3411c3ed3 100644 --- a/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.old +++ b/baremetal/example/aarch32_cache_mmu_wr/sdkconfig.old @@ -19,7 +19,7 @@ CONFIG_TARGET_ARMV8_AARCH32=y # CONFIG_TARGET_F2000_4 is not set # CONFIG_TARGET_AARCH32_QEMU is not set # CONFIG_TARGET_AARCH64_QEMU is not set -CONFIG_TARGET_E2000=y +# CONFIG_TARGET_E2000 is not set # end of Target Setting # diff --git a/bsp/arch/armv8/aarch32/aarch32.h b/bsp/arch/armv8/aarch32/aarch32.h index 7a67ba379..29a537c7b 100644 --- a/bsp/arch/armv8/aarch32/aarch32.h +++ b/bsp/arch/armv8/aarch32/aarch32.h @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0. * * @Date: 2021-06-23 15:01:04 - * @LastEditTime: 2021-06-29 17:30:11 + * @LastEditTime: 2021-07-06 14:09:53 * @Description:  This files is for * * @Modify History: @@ -63,6 +63,17 @@ extern "C" return __MRC(15, 0, 14, 2, 1); } + /** + * @name: aarch32_cntp_tlb_get + * @msg: + * @return {*} + * @param {__STATIC_INLINE u32} aarch32_cntp_ctl_get + */ + __attribute__((always_inline)) __STATIC_INLINE u32 aarch32_cntp_tlb_get(void) + { + return __MRC(15, 0, 0, 2, 0); + } + /** * @name: aarch32_cntp_ctl_set * @msg: Read the register that holds the timer value for the EL1 physical timer. diff --git a/bsp/arch/armv8/aarch32/cp15.h b/bsp/arch/armv8/aarch32/cp15.h index 74a7a6faa..de912ff8b 100644 --- a/bsp/arch/armv8/aarch32/cp15.h +++ b/bsp/arch/armv8/aarch32/cp15.h @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0. * * @Date: 2021-06-17 14:51:38 - * @LastEditTime: 2021-06-22 15:23:59 + * @LastEditTime: 2021-07-06 14:24:59 * @Description:  This files is for * * @Modify History: @@ -35,7 +35,6 @@ void cpu_dcache_enable(); s32 cp15_get_cpu_id(); void cp15_set_vector_base(unsigned int addr); -s32 DisableInterrupt(); -void EnableInterrupt(s32 level); + #endif /* BSP_ARCH_ARMV8_AARCH32_CP15 */ \ No newline at end of file diff --git a/bsp/arch/armv8/aarch32/gcc/cp15.S b/bsp/arch/armv8/aarch32/gcc/cp15.S index 2fa70bf2b..efef4d197 100644 --- a/bsp/arch/armv8/aarch32/gcc/cp15.S +++ b/bsp/arch/armv8/aarch32/gcc/cp15.S @@ -15,7 +15,7 @@ cpu_mmu_disable: .globl cpu_mmu_enable cpu_mmu_enable: mrc p15, #0, r0, c1, c0, #0 - orr r0, r0, #0x001 + orr r0, r0, #0x001 @ bit 1, mmu enable mcr p15, #0, r0, c1, c0, #0 @ set mmu enable bit dsb bx lr diff --git a/bsp/arch/armv8/aarch32/gcc/exception_debug.c b/bsp/arch/armv8/aarch32/gcc/exception_debug.c new file mode 100644 index 000000000..c7115e92e --- /dev/null +++ b/bsp/arch/armv8/aarch32/gcc/exception_debug.c @@ -0,0 +1,96 @@ +/* + * @ : Copyright (c) 2021 Phytium Information Technology, Inc. + * + * SPDX-License-Identifier: Apache-2.0. + * + * @Date: 2021-07-06 08:08:20 + * @LastEditTime: 2021-07-06 14:41:37 + * @Description:  This files is for + * + * @Modify History: + * Ver   Who        Date         Changes + * ----- ------     --------    -------------------------------------- + */ + +#include +#include "aarch32.h" + +//#define EXCEPTION_DEBUG_ON + +void FiqDebug() +{ +#ifdef EXCEPTION_DEBUG_ON + printf("fiq abort\r\n"); +#endif +} + +void UdfDebug() +{ +#ifdef EXCEPTION_DEBUG_ON + printf("undefine abort\r\n"); +#endif +} + +void SwiDebug() +{ +#ifdef EXCEPTION_DEBUG_ON + printf("software irq abort\r\n"); +#endif +} + +void PrfDebug() +{ +#ifdef EXCEPTION_DEBUG_ON + printf("prefetch abort\r\n"); +#endif +} + +void DatDebug() +{ +#ifdef EXCEPTION_DEBUG_ON + printf("data abort\r\n"); +#endif +} + +void TraceDebug() +{ + printf("stub \r\n"); +} + +void TraceDebug1() +{ + printf("stub 1\r\n"); +} + +void TraceDebug2() +{ + printf("stub 1\r\n"); +} + +void TraceMRC() +{ + /* bit : 0 -- M – Enable the MMU + 1 -- A – Alignment check enable + 2 -- C – Cache enable bit + 11 -- Z – Branch prediction enable + 12 -- I – Instruction cache enable bit + 13 -- V – This bit selects the base address of the exception vector table + 21 -- FI – FIQ configuration enable + 22 -- U – Indicates use of the alignment model. + 25 -- EE - Exception endianness + 30 -- TE – Thumb exception enable */ + printf("MRC: 0x%x\r\n", aarch32_sctrl_get()); +} + +void TraceTLB() +{ + /* + TTBR0 + */ + printf("TLB: 0x%x\r\n", aarch32_cntp_tlb_get()); +} + +void TraceR0(u32 r0) +{ + printf("r0: 0x%x \r\n", r0); +} \ No newline at end of file diff --git a/bsp/arch/armv8/aarch32/gcc/start.S b/bsp/arch/armv8/aarch32/gcc/start.S index f0b34a498..8e2194689 100644 --- a/bsp/arch/armv8/aarch32/gcc/start.S +++ b/bsp/arch/armv8/aarch32/gcc/start.S @@ -113,8 +113,8 @@ el2_mode: el1_mode: #endif -.global Reset_Handler -Reset_Handler: +.global RST_Handler +RST_Handler: cpsid i /* Mask interrupts */ /* set VBAR to the system_vectors address in linker script */ @@ -130,7 +130,8 @@ Reset_Handler: beq overHyped b continue -overHyped: /* Get out of HYP mode */ +/* Get out of HYP mode */ +overHyped: adr r1, continue msr ELR_hyp, r1 mrs r1, cpsr_all @@ -143,10 +144,10 @@ continue: cps MODE_SVC invalidate_caches_tlb: - mov r0,#0 /* r0 = 0 */ - mcr p15, 0, r0, c8, c7, 0 /* invalidate TLBs */ - mcr p15, 0, r0, c7, c5, 0 /* invalidate icache */ - mcr p15, 0, r0, c7, c5, 6 /* Invalidate branch predictor array */ + mov r0,#0 /* r0 = 0 */ + mcr p15, 0, r0, c8, c7, 0 /* invalidate TLBs */ + mcr p15, 0, r0, c7, c5, 0 /* invalidate icache */ + mcr p15, 0, r0, c7, c5, 6 /* Invalidate branch predictor array */ bl invalidate_dcache /* invalidate dcache */ disable_cache_mmu: @@ -195,6 +196,17 @@ irq_loop: strlt r0, [r1], #4 blt irq_loop + /* System mode */ + msr cpsr_c, MODE_SYS + ldr r1, =_sys_stack_start + ldr sp, =_sys_stack_end + +sys_loop: + cmp r1, sp + strlt r0, [r1], #4 + blt sys_loop + +/* PUT SVC IN THE END, START UP WITH SVC MODE!!! */ /* Supervisor mode */ msr cpsr_c, MODE_SVC ldr r1, =_svc_stack_start @@ -206,16 +218,6 @@ svc_loop: strlt r0, [r1], #4 blt svc_loop - /* System mode */ - msr cpsr_c, MODE_SYS - ldr r1, =_sys_stack_start - ldr sp, =_sys_stack_end - -sys_loop: - cmp r1, sp - strlt r0, [r1], #4 - blt sys_loop - /* Start copying data */ ldr r0, =_text_end /* section address has been defined in ld script */ ldr r1, =_data_start @@ -241,6 +243,10 @@ bss_loop: strlt r0, [r1], #4 blt bss_loop +@ using fpu +mov r4, #0xfffffff +mcr p15, 0, r4, c1, c0, 2 + #ifdef CONFIG_USE_CACHE init_cache_mmu: ldr r0, =platform_mem_desc @@ -248,7 +254,16 @@ init_cache_mmu: ldr r1, [r1] bl InitMMUTable bl InitCache -#endif +#endif + +extra_init: + @ Enable access to FP registers. + mov r1, #(0xF << 20) + mcr p15, 0, r1, c1, c0, 2 // CPACR full access to cp11 and cp10. + @ Enable Floating point and Neon unit. + mov r1, #(0x1 << 30) + vmsr FPEXC, r1 + ISB @Ensure the enable operation takes effect. extra_init: // Switch on the FP and NEON hardware. diff --git a/bsp/arch/armv8/aarch32/gcc/vector.S b/bsp/arch/armv8/aarch32/gcc/vector.S index bbc3c1e27..c6550a8b0 100644 --- a/bsp/arch/armv8/aarch32/gcc/vector.S +++ b/bsp/arch/armv8/aarch32/gcc/vector.S @@ -6,11 +6,11 @@ .balign 2048 .global system_vectors system_vectors: - b Reset_Handler - b Undef_Handler /* 0x4 Undefined Instruction */ + b RST_Handler + b UDF_Handler /* 0x4 Undefined Instruction */ b SWI_Handler /* 0x8 Software Interrupt */ - b Pref_Handler /* 0xC Prefetch Abort */ - b Databt_Handler /* 0x10 Data Abort */ + b PRF_Handler /* 0xC Prefetch Abort */ + b DAT_Handler /* 0x10 Data Abort */ b . /* 0x14 Reserved */ b IRQ_Handler /* 0x18 IRQ */ b FIQ_Handler /* 0x1C FIQ */ @@ -65,11 +65,19 @@ IRQ_Handler: /* 0x18 IRQ */ .type FIQ_Handler, %function .global FIQ_Handler FIQ_Handler: /* 0x18 IRQ */ - b Abort_Exception + bl FiqDebug + b Abort_Exception + .size FIQ_Handler, . - FIQ_Handler -.global Undef_Handler -Undef_Handler: /* 0x4 Undefined Instruction */ - b Abort_Exception +.align 2 +.arm +.weak UDF_Handler +.type UDF_Handler, %function +.global UDF_Handler +UDF_Handler: /* 0x4 Undefined Instruction */ + bl UdfDebug + b Abort_Exception + .size UDF_Handler, . - UDF_Handler .align 2 .arm @@ -77,12 +85,26 @@ Undef_Handler: /* 0x4 Undefined Instruction */ .type SWI_Handler, %function .global SWI_Handler SWI_Handler: /* 0x8 Software Interrupt */ - b Abort_Exception + bl SwiDebug + b Abort_Exception + .size SWI_Handler, . - SWI_Handler -.global Pref_Handler -Pref_Handler: /* 0xC Prefetch Abort */ - b Abort_Exception +.align 2 +.arm +.weak PRF_Handler +.type PRF_Handler, %function +.global PRF_Handler +PRF_Handler: /* 0xC Prefetch Abort */ + bl PrfDebug + b Abort_Exception + .size PRF_Handler, . - PRF_Handler -.global Databt_Handler -Databt_Handler: /* 0x10 Data Abort */ - b Abort_Exception \ No newline at end of file +.align 2 +.arm +.weak DAT_Handler +.type DAT_Handler, %function +.global DAT_Handler +DAT_Handler: /* 0x10 Data Abort */ + bl DatDebug + b Abort_Exception + .size DAT_Handler, . - DAT_Handler \ No newline at end of file diff --git a/bsp/arch/armv8/aarch32/mmu.c b/bsp/arch/armv8/aarch32/mmu.c index 847b4c123..1240460c5 100644 --- a/bsp/arch/armv8/aarch32/mmu.c +++ b/bsp/arch/armv8/aarch32/mmu.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0. * * @Date: 2021-06-29 09:20:24 - * @LastEditTime: 2021-06-29 10:09:30 + * @LastEditTime: 2021-07-06 15:10:49 * @Description:  This files is for * * @Modify History: @@ -12,10 +12,17 @@ * ----- ------     --------    -------------------------------------- */ +#include "sdkconfig.h" #include #include "ft_types.h" #include "mmu.h" #include "cp15.h" +#include "ft_debug.h" + +#define MMU_DEBUG_TAG "MMU" +#define MMU_ERROR(format, ...) FT_DEBUG_PRINT_E(MMU_DEBUG_TAG, format, ##__VA_ARGS__) +#define MMU_DEBUG_I(format, ...) FT_DEBUG_PRINT_I(MMU_DEBUG_TAG, format, ##__VA_ARGS__) +#define MMU_DEBUG_D(format, ...) FT_DEBUG_PRINT_D(MMU_DEBUG_TAG, format, ##__VA_ARGS__) /* dump 2nd level page table */ void Dump2ndPageTable(u32 *ptb) @@ -142,6 +149,7 @@ void SetMMUTable(u32 vaddrStart, } } +/* DACR, Defines the access permission for each of the sixteen memory domains. */ unsigned long SetDomainReg(unsigned long domain_val) { unsigned long old_domain; @@ -167,8 +175,8 @@ void InitMMU(void) { #ifdef CONFIG_USE_MMU cpu_mmu_disable(); - /*rt_hw_cpu_dump_page_table(MMUTable);*/ - SetDomainReg(0x55555555); + //SetDomainReg(0x55555555); //refer to DACR + SetDomainReg(0xffffffff); cpu_tlb_set(MMUTable); cpu_mmu_enable(); #endif diff --git a/bsp/common/Kconfig b/bsp/common/Kconfig index e43d6c104..d074d8650 100644 --- a/bsp/common/Kconfig +++ b/bsp/common/Kconfig @@ -12,19 +12,16 @@ choice DEBUG_LOG_LEVEL config LOG_VERBOS bool "VERBOS" - select LOG_LEVEL_VERBOS config LOG_DEBUG bool "DEBUG" - select LOG_LEVEL_DEBUG config LOG_INFO bool "INFO" - select LOG_LEVEL_INFO config LOG_WARN bool "WARN" - select LOG_LEVEL_WARN config LOG_ERROR bool "ERROR" - select LOG_LEVEL_ERROR + config LOG_NONE + bool "NONE" endchoice # DEBUG_LOG_LEVEL diff --git a/bsp/common/ft_debug.h b/bsp/common/ft_debug.h index d63dfc4d2..182c82df4 100644 --- a/bsp/common/ft_debug.h +++ b/bsp/common/ft_debug.h @@ -4,7 +4,7 @@  * SPDX-License-Identifier: Apache-2.0.  * * @Date: 2021-04-07 09:53:07 - * @LastEditTime: 2021-06-25 15:01:19 + * @LastEditTime: 2021-07-06 09:54:30 * @Description:  This files is for debug functions * * @Modify History: @@ -15,6 +15,7 @@ #ifndef BSP_COMMON_FT_DEBUG_H #define BSP_COMMON_FT_DEBUG_H #include +#include "sdkconfig.h" #include "ft_types.h" typedef enum @@ -43,8 +44,21 @@ typedef enum #define LOG_COLOR_D #define LOG_COLOR_V -#ifndef LOG_LOCAL_LEVEL -#define LOG_LOCAL_LEVEL FT_LOG_VERBOSE +/* select debug log level */ +#ifdef CONFIG_LOG_ERROR +#define LOG_LOCAL_LEVEL FT_LOG_ERROR +#endif + +#ifdef CONFIG_LOG_WARN +#define LOG_LOCAL_LEVEL FT_LOG_WARN +#endif + +#ifdef CONFIG_LOG_INFO +#define LOG_LOCAL_LEVEL FT_LOG_INFO +#endif + +#ifdef CONFIG_LOG_DEBUG +#define LOG_LOCAL_LEVEL FT_LOG_DEBUG #endif #define LOG_FORMAT(letter, format) LOG_COLOR_##letter " %s: " format LOG_RESET_COLOR "\r\n" @@ -65,11 +79,20 @@ typedef enum #define EARLY_LOGW(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_WARN, W, ##__VA_ARGS__) #define EARLY_LOGV(tag, format, ...) LOG_EARLY_IMPL(tag, format, FT_LOG_VERBOSE, W, ##__VA_ARGS__) +/* do not compile log if define CONFIG_LOG_NONE */ +#ifndef CONFIG_LOG_NONE #define FT_DEBUG_PRINT_I(TAG, format, ...) EARLY_LOGI(TAG, format, ##__VA_ARGS__) #define FT_DEBUG_PRINT_E(TAG, format, ...) EARLY_LOGE(TAG, format, ##__VA_ARGS__) #define FT_DEBUG_PRINT_D(TAG, format, ...) EARLY_LOGD(TAG, format, ##__VA_ARGS__) #define FT_DEBUG_PRINT_W(TAG, format, ...) EARLY_LOGW(TAG, format, ##__VA_ARGS__) #define FT_DEBUG_PRINT_V(TAG, format, ...) EARLY_LOGV(TAG, format, ##__VA_ARGS__) +#else +#define FT_DEBUG_PRINT_I(TAG, format, ...) +#define FT_DEBUG_PRINT_E(TAG, format, ...) +#define FT_DEBUG_PRINT_D(TAG, format, ...) +#define FT_DEBUG_PRINT_W(TAG, format, ...) +#define FT_DEBUG_PRINT_V(TAG, format, ...) +#endif #define FT_RAW_PRINTF(format, ...) PORT_KPRINTF(format, ##__VA_ARGS__) diff --git a/export.sh b/export.sh index f6fa6dc67..4cb572405 100644 --- a/export.sh +++ b/export.sh @@ -5,7 +5,7 @@ # SPDX-License-Identifier: Apache-2.0. # # @Date: 2021-06-30 17:24:45 - # @LastEditTime: 2021-07-01 19:03:48 + # @LastEditTime: 2021-07-06 15:37:55 # @Description:  This files is for  # # @Modify History: @@ -68,11 +68,6 @@ if [ $OFFLINE_INSTALL -ne 1 ]; then [ ! -d $AARCH64_CROSS_PATH ] && [ ! -f $INSTALL_PATH/$AARCH64_CC_PACK ] && wget -P $INSTALL_PATH/ $AARCH64_URL fi -if [ ! -f $INSTALL_PATH/$AARCH32_CC_PACK ] || [ ! -f $INSTALL_PATH/$AARCH64_CC_PACK ]; then - echo "Gcc compiler package non found !!!"$INSTALL_PATH/$AARCH64_CC_PACK - exit 1 -fi - ##################SET COMPILER PATH############## ## AARCH32 CC [ ! -d $AARCH32_CROSS_PATH ] && sudo tar -C $INSTALL_PATH/ -jxvf $INSTALL_PATH/$AARCH32_CC_PACK diff --git a/make/ld/e2000_ft2004_aarch32_ram.ld b/make/ld/e2000_ft2004_aarch32_ram.ld index cce182bf8..090a8b466 100644 --- a/make/ld/e2000_ft2004_aarch32_ram.ld +++ b/make/ld/e2000_ft2004_aarch32_ram.ld @@ -71,14 +71,15 @@ SECTIONS _irq_stack_start = _fiq_stack_end; _irq_stack_end = _irq_stack_start + 0x1000; /* 64 KB */ - _svc_stack_start = _irq_stack_end; - _svc_stack_end = _svc_stack_start + 0x1000; /* 64 KB */ - - _sys_stack_start = _svc_stack_end; + _sys_stack_start = _irq_stack_end; _sys_stack_end = _sys_stack_start + 0x1000; /* 64 KB */ + /* put svc at end and start up with SVC mode */ + _svc_stack_start = _sys_stack_end; + _svc_stack_end = _svc_stack_start + 0x1000; /* 64 KB */ + _irq_stack_size = _irq_stack_end - _irq_stack_start; _fiq_stack_size = _fiq_stack_end - _fiq_stack_start; - _svc_stack_size = _svc_stack_end - _svc_stack_start; _sys_stack_size = _sys_stack_end - _sys_stack_start; + _svc_stack_size = _svc_stack_end - _svc_stack_start; } diff --git a/make/ld/qemu_aarch32_ram.ld b/make/ld/qemu_aarch32_ram.ld index 0c87d16ed..c8057deeb 100644 --- a/make/ld/qemu_aarch32_ram.ld +++ b/make/ld/qemu_aarch32_ram.ld @@ -67,14 +67,15 @@ SECTIONS _irq_stack_start = _fiq_stack_end; _irq_stack_end = _irq_stack_start + 0x1000; /* 64 KB */ - _svc_stack_start = _irq_stack_end; - _svc_stack_end = _svc_stack_start + 0x1000; /* 64 KB */ - - _sys_stack_start = _svc_stack_end; + _sys_stack_start = _irq_stack_end; _sys_stack_end = _sys_stack_start + 0x1000; /* 64 KB */ + /* put svc at end and start up with SVC mode */ + _svc_stack_start = _sys_stack_end; + _svc_stack_end = _svc_stack_start + 0x1000; /* 64 KB */ + _irq_stack_size = _irq_stack_end - _irq_stack_start; _fiq_stack_size = _fiq_stack_end - _fiq_stack_start; - _svc_stack_size = _svc_stack_end - _svc_stack_start; _sys_stack_size = _sys_stack_end - _sys_stack_start; + _svc_stack_size = _svc_stack_end - _svc_stack_start; }