From c38dcff60bf78f1612429c3d80c3e1bc962dd462 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9D=8E=E4=B9=94=E4=B8=AD?= Date: Thu, 10 Oct 2024 08:59:03 +0000 Subject: [PATCH] !178 v1.4.0 release 20241010 v1.4.0 release 20241010 --- .gitlab-ci.yml | 15 ++++ README.md | 2 +- board/d2000_test/eth_board.h | 4 +- board/ft2004_dsk/eth_board.h | 4 +- doc/ChangeLog.md | 56 ++++++++++++ doc/reference/driver/fwdt.md | 4 +- drivers/qspi/fqspi/fqspi.c | 23 +++++ drivers/qspi/fqspi/fqspi.h | 3 + drivers/qspi/fqspi/fqspi_flash.c | 86 +++++++++++-------- drivers/qspi/fqspi/fqspi_flash.h | 5 +- drivers/qspi/fqspi/fqspi_hw.h | 20 +++++ drivers/watchdog/fwdt/fwdt.c | 10 +-- drivers/watchdog/fwdt/fwdt.h | 3 - .../udp_client/src/udp_client_example.c | 5 +- .../udp_server/src/udp_server_example.c | 5 +- .../pin/src/pin_gpio_multi_input_example.c | 4 +- example/peripherals/qspi/README.md | 1 + .../qspi/src/qspi_dual_flash_stack_example.c | 9 +- .../qspi/src/qspi_flash_polled_example.c | 17 +++- .../src/sata_controller_common.c | 2 +- .../src/sata_controller_fpdma_example.c | 4 +- .../src/sata_controller_pio_example.c | 4 +- .../src/sata_controller_pio_intr_example.c | 4 +- .../peripherals/spi/src/spim_pressure_test.c | 5 +- example/peripherals/wdt/README.md | 4 +- .../peripherals/wdt/inc/wdt_intr_example.h | 2 +- .../peripherals/wdt/inc/wdt_polled_example.h | 2 +- .../peripherals/wdt/src/wdt_intr_example.c | 5 +- .../peripherals/wdt/src/wdt_polled_example.c | 7 +- .../src/nested_interrupt_timer_example.c | 7 ++ install.py | 2 +- .../sfud-1.1.0/ports/fqspi/fqspi_sfud_core.c | 10 ++- tools/build/ld/aarch32_ram.ld | 24 ++++-- tools/build/ld/aarch64_ram.ld | 27 ++++-- 34 files changed, 284 insertions(+), 101 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8e12a1175..86121a320 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -9,6 +9,7 @@ stages: - compile_stage # 编译阶段 - test_stage # 测试阶段 - misrac_check_stage # misrac静态检测阶段 + - report_stage # 测试报表生成阶段 - post_stage # 收尾阶段 # 所有soc覆盖编译启动 @@ -192,3 +193,17 @@ misrac_check: - compile allow_failure: true when: manual + +# 测试报表生成 +update_report: + stage: report_stage + script: + - echo "CI_PROJECT_DIR = $CI_PROJECT_DIR" + - cd /home/gitlab-runner/test_tool/phytium-test-tools/test_tool + - python3 gitlab_pipeline_report_display.py standalone $CI_PROJECT_DIR + tags: + - test + when: manual + artifacts: + paths: + - report_for_gitlab_pipeline/ \ No newline at end of file diff --git a/README.md b/README.md index e0cc0eaa8..b97ff6b81 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@ # Phytium-Standalone-SDK -**v1.3.1** [ReleaseNote](./doc/ChangeLog.md) +**v1.4.0** [ReleaseNote](./doc/ChangeLog.md) ## 1. 项目概要 diff --git a/board/d2000_test/eth_board.h b/board/d2000_test/eth_board.h index 17a87b16f..b543a0a1a 100644 --- a/board/d2000_test/eth_board.h +++ b/board/d2000_test/eth_board.h @@ -38,12 +38,12 @@ extern "C" #define MAC_NUM0 0 #define MAC_NUM0_CONTROLLER FGMAC0_ID #define MAC_NUM0_LWIP_PORT_TYPE LWIP_PORT_TYPE_GMAC -#define MAC_NUM0_MII_INTERFACE LWIP_PORT_INTERFACE_SGMII +#define MAC_NUM0_MII_INTERFACE LWIP_PORT_INTERFACE_RGMII #define MAC_NUM1 1 #define MAC_NUM1_CONTROLLER FGMAC1_ID #define MAC_NUM1_LWIP_PORT_TYPE LWIP_PORT_TYPE_GMAC -#define MAC_NUM1_MII_INTERFACE LWIP_PORT_INTERFACE_SGMII +#define MAC_NUM1_MII_INTERFACE LWIP_PORT_INTERFACE_RGMII #ifdef __cplusplus diff --git a/board/ft2004_dsk/eth_board.h b/board/ft2004_dsk/eth_board.h index f589461c5..f020e2180 100644 --- a/board/ft2004_dsk/eth_board.h +++ b/board/ft2004_dsk/eth_board.h @@ -38,12 +38,12 @@ extern "C" #define MAC_NUM0 0 #define MAC_NUM0_CONTROLLER FGMAC0_ID #define MAC_NUM0_LWIP_PORT_TYPE LWIP_PORT_TYPE_GMAC -#define MAC_NUM0_MII_INTERFACE LWIP_PORT_INTERFACE_SGMII +#define MAC_NUM0_MII_INTERFACE LWIP_PORT_INTERFACE_RGMII #define MAC_NUM1 1 #define MAC_NUM1_CONTROLLER FGMAC1_ID #define MAC_NUM1_LWIP_PORT_TYPE LWIP_PORT_TYPE_GMAC -#define MAC_NUM1_MII_INTERFACE LWIP_PORT_INTERFACE_SGMII +#define MAC_NUM1_MII_INTERFACE LWIP_PORT_INTERFACE_RGMII #ifdef __cplusplus } diff --git a/doc/ChangeLog.md b/doc/ChangeLog.md index a8e09f9c8..e9592b995 100644 --- a/doc/ChangeLog.md +++ b/doc/ChangeLog.md @@ -1,3 +1,59 @@ +# Phytium Standalone SDK 2024-10-08 v1.4.0 ChangeLog + +Change Log since 2024-09-27 + +- .gitlab-ci.yml support auto-report + +## example + +- modify gpio example output info +- modify TEST_SPI_CLK_HZ macro definition of spi pressure example + +## tools + +- modify aarch32_ram.ld and aarch32_ram.ld to resolve the issue of section misalignment caused by excessive compilation path depth + +# Phytium Standalone SDK 2024-09-30 ChangeLog + +Change Log since 2024-09-30 + +## example + +- Refine nested interrupt generic timer example + +# Phytium Standalone SDK 2024-09-26 ChangeLog + +Change Log since 2024-09-25 + +## board + +- change the phy interface type of ft2004 and d2000 + +## example + +- added udp network interface binding + +# Phytium Standalone SDK 2024-09-25 ChangeLog + +Change Log since 2024-09-25 + +## driver + +- modify qspi driver write data functions +- add FQspiCycleSet function + +# Phytium Standalone SDK 2024-09-25 ChangeLog + +Change Log since 2024-09-24 + +## driver + +- refine FWdtSetTimeout function, change the unit of timeout + +## example + +- set the timeout unit to tick, use GenericTimerFrequecy + # Phytium Standalone SDK 2024-09-14 ChangeLog Change Log since 2024-09-10 diff --git a/doc/reference/driver/fwdt.md b/doc/reference/driver/fwdt.md index 738a1f80d..ee4242641 100644 --- a/doc/reference/driver/fwdt.md +++ b/doc/reference/driver/fwdt.md @@ -102,13 +102,13 @@ u32 FWdtSetTimeout(FWdtCtrl *pCtrl, u32 timeout); Note: - 此函数会根据传入的超时时间初始化WDT寄存器; - - WDT两次超时后，才执行系统复位操作；例如希望WDT 6s后复位，则应设置timeout=3; + - WDT两次超时后，才执行系统复位操作；例如希望WDT 6s后复位，则应设置timeout = GenericTimerFrequecy() * 3; Input: - FWdtCtrl *pCtrl, WDT驱动实例数据 - - u32 timeout, 设置的WDT超时时间，最大不超过89 + - u32 timeout, 设置的WDT超时时间，单位为系统时钟tick Return: diff --git a/drivers/qspi/fqspi/fqspi.c b/drivers/qspi/fqspi/fqspi.c index 4e9ff99dd..483326256 100644 --- a/drivers/qspi/fqspi/fqspi.c +++ b/drivers/qspi/fqspi/fqspi.c @@ -312,3 +312,26 @@ void FQspiCsTimingSet(FQspiCtrl *pctrl, FQspiCsTimingCfgDef *cs_timing_cfg) } +/** + * @name: FQspiCycleSet + * @msg: Implements finer-grained integer division from 2 to 256 + * @param {FQspiCtrl} *pctrl, instance of FQSPI controller + * @param {u8} Frequency division coefficient + * @param {u8} enable enable or disable cycle set + * @return + */ +void FQspiCycleSet(FQspiCtrl *pctrl, u8 clk_div, u8 enable) +{ + FASSERT(pctrl); + uintptr base_addr = pctrl->config.base_addr; + u32 cycle_plus = clk_div - 1; + + if (enable) + { + FQSPI_WRITE_REG32(base_addr, FQSPI_REG_CYCLE_OFFSET, FQSPI_CYCLE_SEL_ENABLE | FQSPI_CYCLE_PLUS(cycle_plus)); + } + else + { + FQSPI_CLEARBIT(base_addr, FQSPI_REG_CYCLE_OFFSET, FQSPI_CYCLE_SEL_ENABLE); + } +} diff --git a/drivers/qspi/fqspi/fqspi.h b/drivers/qspi/fqspi/fqspi.h index 9c6b57260..04a335d36 100644 --- a/drivers/qspi/fqspi/fqspi.h +++ b/drivers/qspi/fqspi/fqspi.h @@ -232,6 +232,9 @@ void FQspiChannelSet(FQspiCtrl *pctrl, u32 channel); /* qspi cs timing set */ void FQspiCsTimingSet(FQspiCtrl *pctrl, FQspiCsTimingCfgDef *cs_timing_cfg); +/* qspi cycle set */ +void FQspiCycleSet(FQspiCtrl *pctrl, u8 clk_div, u8 enable); + #ifdef __cplusplus } #endif diff --git a/drivers/qspi/fqspi/fqspi_flash.c b/drivers/qspi/fqspi/fqspi_flash.c index 7d3a15b1d..cfea5d1a2 100644 --- a/drivers/qspi/fqspi/fqspi_flash.c +++ b/drivers/qspi/fqspi/fqspi_flash.c @@ -574,13 +574,12 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command) * @name: FQspiFlashWriteData * @msg: write flash data * @param {FQspiCtrl} *pctrl, instance of FQSPI controller - * @param {u8} command, command to write flash，see the Flash manual for details * @param {u32} chip_addr, The start address of the chip to write * @param {u8} *buf, write buffer * @param {size_t} len, write length * @return {FError} err code information, FQSPI_SUCCESS indicates success，others indicates failed 表示写入成功，其它返回值表示写入失败 */ -FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8 *buf, size_t len) +FError FQspiFlashWriteData(FQspiCtrl *pctrl, u32 chip_addr, const u8 *buf, size_t len) { FASSERT(pctrl && buf); FError ret = FQSPI_SUCCESS; @@ -589,7 +588,6 @@ FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8 u32 reg_val = 0; u32 val = 0; u32 aligned_bit = 0; - u8 tmp[FQSPI_ALIGNED_BYTE] = {0xff, 0xff, 0xff, 0xff}; uintptr addr = pctrl->config.mem_start + pctrl->config.channel * pctrl->flash_size + chip_addr; uintptr base_addr = pctrl->config.base_addr; @@ -608,40 +606,6 @@ FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8 return ret; } - memset(&pctrl->wr_cfg, 0, sizeof(pctrl->wr_cfg)); - /* set cmd region, command */ - pctrl->wr_cfg.wr_cmd = command; - pctrl->wr_cfg.wr_wait = FQSPI_WAIT_ENABLE; - /* clear addr select bit */ - pctrl->wr_cfg.wr_addr_sel = 0; - /* set wr mode, use buffer */ - pctrl->wr_cfg.wr_mode = FQSPI_USE_BUFFER_ENABLE; - /* set sck_sel region, clk_div */ - pctrl->wr_cfg.wr_sck_sel = FQSPI_SCK_DIV_128; - - /* set addr_sel region, FQSPI_ADDR_SEL_3 or FQSPI_ADDR_SEL_4 */ - switch (command) - { - case FQSPI_FLASH_CMD_PP: - pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_3; - break; - case FQSPI_FLASH_CMD_QPP: - pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_3; - pctrl->wr_cfg.wr_transfer = FQSPI_TRANSFER_1_1_4; - break; - case FQSPI_FLASH_CMD_4PP: - case FQSPI_FLASH_CMD_4QPP: - pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_4; - break; - default: - ret |= FQSPI_NOT_SUPPORT; - return ret; - break; - } - - /*write wr_cfg to Write config register 0x08 */ - FQspiWrCfgConfig(pctrl); - if (IS_ALIGNED(addr, FQSPI_ALIGNED_BYTE)) /* if copy src is aligned by 4 bytes */ { /* write alligned data into memory space */ @@ -702,6 +666,54 @@ FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8 return ret; } +/** + * @name: FQspiFlashWriteDataConfig + * @msg: write flash data configuration + * @param {FQspiCtrl} *pctrl, instance of FQSPI controller + * @param {u8} command, command to write flash，see the Flash manual for details + * @return {FError} err code information, FQSPI_SUCCESS indicates success，others indicates failed 表示配置成功，其它返回值表示配置失败 + */ +FError FQspiFlashWriteDataConfig(FQspiCtrl *pctrl, u8 command) +{ + FASSERT(pctrl); + FError ret = FQSPI_SUCCESS; + memset(&pctrl->wr_cfg, 0, sizeof(pctrl->wr_cfg)); + /* set cmd region, command */ + pctrl->wr_cfg.wr_cmd = command; + pctrl->wr_cfg.wr_wait = FQSPI_WAIT_ENABLE; + /* clear addr select bit */ + pctrl->wr_cfg.wr_addr_sel = 0; + /* set wr mode, use buffer */ + pctrl->wr_cfg.wr_mode = FQSPI_USE_BUFFER_ENABLE; + /* set sck_sel region, clk_div */ + pctrl->wr_cfg.wr_sck_sel = FQSPI_SCK_DIV_128; + + /* set addr_sel region, FQSPI_ADDR_SEL_3 or FQSPI_ADDR_SEL_4 */ + switch (command) + { + case FQSPI_FLASH_CMD_PP: + pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_3; + break; + case FQSPI_FLASH_CMD_QPP: + pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_3; + pctrl->wr_cfg.wr_transfer = FQSPI_TRANSFER_1_1_4; + break; + case FQSPI_FLASH_CMD_4PP: + case FQSPI_FLASH_CMD_4QPP: + pctrl->wr_cfg.wr_addr_sel = FQSPI_ADDR_SEL_4; + break; + default: + ret |= FQSPI_NOT_SUPPORT; + return ret; + break; + } + + /*write wr_cfg to Write config register 0x08 */ + FQspiWrCfgConfig(pctrl); + + return ret; +} + /** * @name: FQspiFlashPortReadData * @msg: read flash data use register port diff --git a/drivers/qspi/fqspi/fqspi_flash.h b/drivers/qspi/fqspi/fqspi_flash.h index 5411d348e..294602e78 100644 --- a/drivers/qspi/fqspi/fqspi_flash.h +++ b/drivers/qspi/fqspi/fqspi_flash.h @@ -128,8 +128,11 @@ FError FQspiFlashReadDataConfig(FQspiCtrl *pctrl, u8 command); /* read flash data */ size_t FQspiFlashReadData(FQspiCtrl *pctrl, u32 chip_addr, u8 *buf, size_t len); +/* write flash data config */ +FError FQspiFlashWriteDataConfig(FQspiCtrl *pctrl, u8 command); + /* write flash data */ -FError FQspiFlashWriteData(FQspiCtrl *pctrl, u8 command, u32 chip_addr, const u8 *buf, size_t len); +FError FQspiFlashWriteData(FQspiCtrl *pctrl, u32 chip_addr, const u8 *buf, size_t len); /* flash erase */ FError FQspiFlashErase(FQspiCtrl *pctrl, u8 command, u32 offset); diff --git a/drivers/qspi/fqspi/fqspi_hw.h b/drivers/qspi/fqspi/fqspi_hw.h index 1ee3ba58e..39f908a4f 100644 --- a/drivers/qspi/fqspi/fqspi_hw.h +++ b/drivers/qspi/fqspi/fqspi_hw.h @@ -48,6 +48,10 @@ extern "C" #define FQSPI_REG_WIP_RD_OFFSET (0x24) /* WIP reads the Settings register */ #define FQSPI_REG_WP_OFFSET (0x28) /* WP register */ #define FQSPI_REG_MODE_OFFSET (0x2C) /* Mode setting register */ +#define FQSPI_REG_CYCLE_OFFSET (0x30) /* Frequency division coefficient setting register */ +#define FQSPI_REG_SAMPLE_OFFSET (0x34) /* Delay sampling setting register */ +#define FQSPI_REG_CTRL_STATE_OFFSET (0x38) /* Controller status register */ +#define FQSPI_REG_FLASH_TIMEOUT_OFFSET (0x40) /* Timeout setting register */ /* FQSPI_CAP */ #define FQSPI_CAP_FLASH_NUM(data) ((data) << 3) /* Flash number */ @@ -134,6 +138,16 @@ extern "C" #define FQSPI_QUAD_READ_MODE_DISABLE 0xF0BF /* disable FLASH XIP MODE */ #define FQSPI_QUAD_READ_MODE_CMD 0xA0 /* FLASH XIP MODE CMD SIGN */ +/* FQSPI_CYCLE */ +#define FQSPI_CYCLE_SEL_ENABLE BIT(8) +#define FQSPI_CYCLE_PLUS(data) ((data) << 0) + +/* FQSPI_SAMPLE */ +#define FQSPI_SAMPLE_DELAY(data) ((data) << 0) + +/* FQSPI_FLASH_TIMEOUT */ +#define FQSPI_FLASH_TIMEOUT(data) ((data) << 0) + typedef enum { FQSPI_CMD_READ = 0x01, @@ -162,6 +176,12 @@ typedef enum /* FQSPI Data Operations */ #define FQSPI_DAT_WRITE(addr, dat) FtOut32((addr), (u32)(dat)) +/* FQSPI Data Operations */ +#define FQSPI_SETBIT(base_addr, reg_offset, data) FtSetBit32((base_addr) + (u32)(reg_offset), (u32)(data)) + +/* FQSPI Data Operations */ +#define FQSPI_CLEARBIT(base_addr, reg_offset, data) FtClearBit32((base_addr) + (u32)(reg_offset), (u32)(data)) + /* read port data */ void FQspiGetPortData(uintptr base_addr, u8 *buf, size_t len); diff --git a/drivers/watchdog/fwdt/fwdt.c b/drivers/watchdog/fwdt/fwdt.c index 42d67a79e..3e08bbbd8 100644 --- a/drivers/watchdog/fwdt/fwdt.c +++ b/drivers/watchdog/fwdt/fwdt.c @@ -117,7 +117,7 @@ void FWdtDeInitialize(FWdtCtrl *pctrl) * second signal which can be used to interrupt higher-privileged software * or cause a PE reset. * @param {WdtCtrl} *pctrl, instance of FWDT controller. - * @param {u32} timeout, represent in seconds, this parameter must be a number between 1 and 89. + * @param {u32} timeout, represent in generic timer tick. * @return {FError} err code information, FWDT_SUCCESS indicates success, others indicates failed. */ FError FWdtSetTimeout(FWdtCtrl *pctrl, u32 timeout) @@ -128,13 +128,9 @@ FError FWdtSetTimeout(FWdtCtrl *pctrl, u32 timeout) FWDT_ERROR("Device is not ready!!!"); return FWDT_NOT_READY; } - if (timeout > FWDT_MAX_TIMEOUT) - { - FWDT_ERROR("Timeout value is invalid."); - return FWDT_ERR_INVAL_PARM; - } + uintptr base_addr = pctrl->config.control_base_addr; - FWDT_WRITE_REG32(base_addr, FWDT_GWDT_WOR, (u32)(GenericTimerFrequecy() * timeout)); + FWDT_WRITE_REG32(base_addr, FWDT_GWDT_WOR, timeout); return FWDT_SUCCESS; } diff --git a/drivers/watchdog/fwdt/fwdt.h b/drivers/watchdog/fwdt/fwdt.h index 75bcebe6d..b94e16f98 100644 --- a/drivers/watchdog/fwdt/fwdt.h +++ b/drivers/watchdog/fwdt/fwdt.h @@ -42,9 +42,6 @@ extern "C" #define FWDT_NOT_SUPPORT FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, 3) #define FWDT_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrBspWdt, 4) -/* max timeout = 0xFFFFFFFF/ WDT_CLK = 89 */ -#define FWDT_MAX_TIMEOUT 89 - typedef struct { u16 version; /* wdt version */ diff --git a/example/network/raw_api/udp_client/src/udp_client_example.c b/example/network/raw_api/udp_client/src/udp_client_example.c index c09b8c78b..8c16ce7a7 100644 --- a/example/network/raw_api/udp_client/src/udp_client_example.c +++ b/example/network/raw_api/udp_client/src/udp_client_example.c @@ -105,7 +105,7 @@ static void SetIP(ip_addr_t* ipaddr,ip_addr_t* gw,ip_addr_t* netmask,u32 mac_id) } -void UdpClient(void) +void UdpClient(struct netif *netif) { struct udp_pcb *client_pcb; struct pbuf *q = NULL; @@ -117,6 +117,7 @@ void UdpClient(void) /*bind the local port and local ip */ ip_addr_t ipaddr; IP_ADDR4(&ipaddr, 192, 168, 4, 10); + udp_bind_netif(client_pcb, netif); udp_bind(client_pcb, &ipaddr, UDP_LOCAL_PORT); IP_ADDR4(&ipaddr, 192, 168, 4, 50); udp_connect(client_pcb, &ipaddr, UDP_REMOTE_PORT); @@ -188,7 +189,7 @@ int UdpClientCreate(void) } printf("Network setup complete.\n"); - UdpClient(); + UdpClient(&board_mac_config[MAC_NUM0].netif); exit: if (ret == FT_SUCCESS) diff --git a/example/network/raw_api/udp_server/src/udp_server_example.c b/example/network/raw_api/udp_server/src/udp_server_example.c index a14232647..108001ec2 100644 --- a/example/network/raw_api/udp_server/src/udp_server_example.c +++ b/example/network/raw_api/udp_server/src/udp_server_example.c @@ -125,7 +125,7 @@ static void udp_recv_callback(void *arg, struct udp_pcb *upcb, struct pbuf *p, c pbuf_free(q); } -void UdpServerInit(void) +void UdpServerInit(struct netif *netif) { err_t ret = ERR_OK; struct udp_pcb *server_pcb; @@ -139,6 +139,7 @@ void UdpServerInit(void) /* 绑定端口号 */ ip_addr_t ipaddr; IP_ADDR4(&ipaddr, 192, 168, 4, 10); + udp_bind_netif(server_pcb, netif); ret = udp_bind(server_pcb, &ipaddr, UDP_ECHO_PORT); if (ret == ERR_USE) { @@ -198,7 +199,7 @@ int UdpServerCreate(void) } printf("Network setup complete.\n"); - UdpServerInit(); + UdpServerInit(&board_mac_config[MAC_NUM0].netif); exit: if (ret == FT_SUCCESS) diff --git a/example/peripherals/pin/src/pin_gpio_multi_input_example.c b/example/peripherals/pin/src/pin_gpio_multi_input_example.c index a5c187346..1609cfae1 100644 --- a/example/peripherals/pin/src/pin_gpio_multi_input_example.c +++ b/example/peripherals/pin/src/pin_gpio_multi_input_example.c @@ -202,12 +202,12 @@ exit: /* print message on example run result */ if (intr_count == GPIO_INPUT_PIN_NUM) { - printf("%s@%d: pin GPIO intr example [success].\r\n", __func__, __LINE__); + printf("%s@%d: pin GPIO multi input example [success].\r\n", __func__, __LINE__); return 0; } else { - printf("%s@%d: pin GPIO intr example [failure].\r\n", __func__, __LINE__); + printf("%s@%d: pin GPIO multi input example [failure].\r\n", __func__, __LINE__); return 1; } } \ No newline at end of file diff --git a/example/peripherals/qspi/README.md b/example/peripherals/qspi/README.md index ae255baca..3b2b8fa95 100644 --- a/example/peripherals/qspi/README.md +++ b/example/peripherals/qspi/README.md @@ -15,6 +15,7 @@ QSPI Flash芯片检测例程 (qspi_flash_connection_check_example.c) QSPI Flash轮询模式读写测试例程 (qspi_flash_polled_example.c) - 初始化QSPI基本配置，并检测已安装Flash的基本信息 +- 配置分频系数为64 - 使用0xD8指令(Sector Erase)擦除Flash芯片指定地址处内容 - 使用0x32指令(Quad Page Program 1-1-4)在Flash芯片内指定地址处写入字符串 - 写入成功后，依次使用0x03(normal read 1-1-1)，0x3B(Dual Output Fast Read 1-1-2)，0x6B(Quad Output Fast Read 1-1-4)指令在指定地址处读取字符串，对读写字符串的内容进行比较，验证读写操作成功 diff --git a/example/peripherals/qspi/src/qspi_dual_flash_stack_example.c b/example/peripherals/qspi/src/qspi_dual_flash_stack_example.c index 598e29a38..67e40de3e 100644 --- a/example/peripherals/qspi/src/qspi_dual_flash_stack_example.c +++ b/example/peripherals/qspi/src/qspi_dual_flash_stack_example.c @@ -67,8 +67,15 @@ static FError FQspiFlashWriteThenRead(FQspiCtrl *pctrl, u8 channel, u32 chip_add return FQSPI_NOT_READY; } + /* write flash data config */ + ret = FQspiFlashWriteDataConfig(&qspi_ctrl, FQSPI_FLASH_CMD_QPP); + if (FQSPI_SUCCESS != ret) + { + FQSPI_ERROR("Failed to config write, test result 0x%x.\r\n", ret); + return FQSPI_NOT_READY; + } /* write norflash data */ - ret = FQspiFlashWriteData(pctrl, write_command, chip_addr, write_buf, len); + ret = FQspiFlashWriteData(pctrl, chip_addr, write_buf, len); if (FQSPI_SUCCESS != ret) { FQSPI_ERROR("Failed to write CSN%d mem, test result 0x%x.\r\n", channel, ret); diff --git a/example/peripherals/qspi/src/qspi_flash_polled_example.c b/example/peripherals/qspi/src/qspi_flash_polled_example.c index 6c29ee7e9..42f6f8911 100644 --- a/example/peripherals/qspi/src/qspi_flash_polled_example.c +++ b/example/peripherals/qspi/src/qspi_flash_polled_example.c @@ -48,7 +48,7 @@ /************************** Variable Definitions *****************************/ static FQspiCtrl qspi_ctrl; /***************** Macros (Inline Functions) Definitions *********************/ - +#define QSPI_POLLED_TEST_DIV 64 /************************** Function Prototypes ******************************/ /************************** Function *****************************************/ @@ -88,7 +88,7 @@ int FQspiFlashPolledExample() if (FQSPI_SUCCESS != ret) { FQSPI_ERROR("Qspi flash detect failed !\r\n"); - goto exit;; + goto exit; } else { @@ -98,6 +98,8 @@ int FQspiFlashPolledExample() /* set to channel CSN0 */ FQspiChannelSet(&qspi_ctrl, FQSPI_CS_0); + FQspiCycleSet(&qspi_ctrl, QSPI_POLLED_TEST_DIV, TRUE); + /*set the write buffer content*/ char *write_content = "qspi flash polled example test"; u8 len = strlen(write_content) + 1; @@ -112,9 +114,16 @@ int FQspiFlashPolledExample() FQSPI_ERROR("Failed to erase mem, test result 0x%x.\r\n", ret); goto exit; } - + /* write flash data config */ + ret = FQspiFlashWriteDataConfig(&qspi_ctrl, FQSPI_FLASH_CMD_QPP); + if (FQSPI_SUCCESS != ret) + { + FQSPI_ERROR("Failed to config write, test result 0x%x.\r\n", ret); + goto exit; + } + /* write norflash data */ - ret = FQspiFlashWriteData(&qspi_ctrl, FQSPI_FLASH_CMD_QPP, rw_start_addr, write_buf, sizeof(write_buf)); + ret = FQspiFlashWriteData(&qspi_ctrl, rw_start_addr, write_buf, sizeof(write_buf)); if (FQSPI_SUCCESS != ret) { FQSPI_ERROR("Failed to write mem, test result 0x%x.\r\n", ret); diff --git a/example/peripherals/sata/sata_controller/src/sata_controller_common.c b/example/peripherals/sata/sata_controller/src/sata_controller_common.c index 64e71c051..4346e1e83 100644 --- a/example/peripherals/sata/sata_controller/src/sata_controller_common.c +++ b/example/peripherals/sata/sata_controller/src/sata_controller_common.c @@ -183,7 +183,7 @@ FError FSataControllerReadWrite(u8 ahci_host, u32 blk, u32 blk_num, u8 *buffer, if (FT_SUCCESS != ret) { - FSATA_ERROR("Sata conrtoller failed to read and write data.\r\n"); + FSATA_ERROR("Sata controller failed to read and write data.\r\n"); return FSATA_ERR_OPERATION; } diff --git a/example/peripherals/sata/sata_controller/src/sata_controller_fpdma_example.c b/example/peripherals/sata/sata_controller/src/sata_controller_fpdma_example.c index e2abf0cd6..e6dba4ead 100644 --- a/example/peripherals/sata/sata_controller/src/sata_controller_fpdma_example.c +++ b/example/peripherals/sata/sata_controller/src/sata_controller_fpdma_example.c @@ -75,7 +75,7 @@ int FSataControllerFpdmaExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, write_buf, SATA_FPDMA_WRITE_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller fpdma write failed !!! \r\n"); + FSATA_ERROR("Sata controller fpdma write failed !!! \r\n"); goto exit; } @@ -84,7 +84,7 @@ int FSataControllerFpdmaExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, read_buf, SATA_FPDMA_READ_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller fpdma read failed !!! \r\n"); + FSATA_ERROR("Sata controller fpdma read failed !!! \r\n"); goto exit; } for (u32 i = 0; i < FSATA_BLOCK_SIZE; i++) diff --git a/example/peripherals/sata/sata_controller/src/sata_controller_pio_example.c b/example/peripherals/sata/sata_controller/src/sata_controller_pio_example.c index d2ea2472b..fbccca40e 100644 --- a/example/peripherals/sata/sata_controller/src/sata_controller_pio_example.c +++ b/example/peripherals/sata/sata_controller/src/sata_controller_pio_example.c @@ -75,7 +75,7 @@ int FSataControllerPioExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, write_buf, SATA_PIO_WRITE_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller pio write failed !!! \r\n"); + FSATA_ERROR("Sata controller pio write failed !!! \r\n"); goto exit; } @@ -84,7 +84,7 @@ int FSataControllerPioExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, read_buf, SATA_PIO_READ_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller pio read failed !!! \r\n"); + FSATA_ERROR("Sata controller pio read failed !!! \r\n"); goto exit; } for (u32 i = 0; i < FSATA_BLOCK_SIZE; i++) diff --git a/example/peripherals/sata/sata_controller/src/sata_controller_pio_intr_example.c b/example/peripherals/sata/sata_controller/src/sata_controller_pio_intr_example.c index 1551b4d16..f79390009 100644 --- a/example/peripherals/sata/sata_controller/src/sata_controller_pio_intr_example.c +++ b/example/peripherals/sata/sata_controller/src/sata_controller_pio_intr_example.c @@ -77,7 +77,7 @@ int FSataControllerPioIntrExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, write_buf, SATA_PIO_WRITE_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller pio write failed !!! \r\n"); + FSATA_ERROR("Sata controller pio write failed !!! \r\n"); goto exit; } @@ -86,7 +86,7 @@ int FSataControllerPioIntrExample() ret = FSataControllerReadWrite(ahci_host, start_blk, blk_num, read_buf, SATA_PIO_READ_MODE); if (ret != FT_SUCCESS) { - FSATA_ERROR("Sata conrtoller pio read failed !!! \r\n"); + FSATA_ERROR("Sata controller pio read failed !!! \r\n"); goto exit; } for (u32 i = 0; i < FSATA_BLOCK_SIZE; i++) diff --git a/example/peripherals/spi/src/spim_pressure_test.c b/example/peripherals/spi/src/spim_pressure_test.c index 7c3f458b9..b7a04b22e 100644 --- a/example/peripherals/spi/src/spim_pressure_test.c +++ b/example/peripherals/spi/src/spim_pressure_test.c @@ -40,8 +40,9 @@ #include "fcache.h" #include "fgeneric_timer.h" -#define RX_TX_LENGTH_MAX (1024 * 512) /*512KB*/ +#define RX_TX_LENGTH_MAX 1024 /* 1KB */ #define SYS_TICKRATE_HZ 100 +#define TEST_SPI_CLK_HZ (FSPI_CLK_FREQ_HZ / 2) /* 测试使用频率 */ #ifdef CONFIG_ENABLE_FDDMA #include "fparameters_comm.h" @@ -478,7 +479,7 @@ static FError FSpimSetupConfig(FSpimTransWay trans_way) spim_config.cpha = FSPIM_CPHA_2_EDGE; spim_config.cpol = FSPIM_CPOL_LOW; spim_config.n_bytes = FSPIM_1_BYTE; - spim_config.sclk_hz = FSPI_DEFAULT_SCLK; + spim_config.sclk_hz = TEST_SPI_CLK_HZ; spim_config.trans_way = trans_way; ret = FSpimCfgInitialize(spim_p, &spim_config); if (FSPIM_SUCCESS != ret) diff --git a/example/peripherals/wdt/README.md b/example/peripherals/wdt/README.md index c2f7bf24b..d26da8879 100644 --- a/example/peripherals/wdt/README.md +++ b/example/peripherals/wdt/README.md @@ -6,8 +6,8 @@ WDT 轮询模式测试例程 (wdt_polled_example.c) -- 初始化WDT,超时时间设定为2s，开启WDT计时 -- 每间隔两秒，进行一次喂狗，并打印计时信息，该操作循环进行五次 +- 初始化WDT，超时时间设定为2s，开启WDT计时 +- 每间隔2s，进行一次喂狗，并打印计时信息，该操作循环进行五次 - 在该过程中不触发开发板的重启，则证明喂狗有效 - 关闭WDT计时，去初始化WDT diff --git a/example/peripherals/wdt/inc/wdt_intr_example.h b/example/peripherals/wdt/inc/wdt_intr_example.h index 5adf5fe06..dbc862b75 100644 --- a/example/peripherals/wdt/inc/wdt_intr_example.h +++ b/example/peripherals/wdt/inc/wdt_intr_example.h @@ -42,7 +42,7 @@ extern "C" /***************** Macros (Inline Functions) Definitions *********************/ /*wdt interrupt example test id*/ #define WDT_INTR_TEST_ID 0 -/*wdt interrupt example test timeout*/ +/*wdt interrupt example test timeout in seconds */ #define WDT_INTR_TEST_TIMEOUT 2 /************************** Function Prototypes ******************************/ /* entry function for wdt interrupt example */ diff --git a/example/peripherals/wdt/inc/wdt_polled_example.h b/example/peripherals/wdt/inc/wdt_polled_example.h index dbeff1da6..109495fdb 100644 --- a/example/peripherals/wdt/inc/wdt_polled_example.h +++ b/example/peripherals/wdt/inc/wdt_polled_example.h @@ -42,7 +42,7 @@ extern "C" /***************** Macros (Inline Functions) Definitions *********************/ /*wdt polled example test id*/ #define WDT_POLLED_TEST_ID 0 -/*wdt polled example test id*/ +/*wdt polled example test timeout in seconds */ #define WDT_POLLED_TEST_TIMEOUT 2 /************************** Function Prototypes ******************************/ diff --git a/example/peripherals/wdt/src/wdt_intr_example.c b/example/peripherals/wdt/src/wdt_intr_example.c index 47d2500cc..aad7f5987 100644 --- a/example/peripherals/wdt/src/wdt_intr_example.c +++ b/example/peripherals/wdt/src/wdt_intr_example.c @@ -100,7 +100,7 @@ int FWdtIntrExample() } else { - printf("The wdt version = %#x, continuation_code=%#x, identity_code=%#x\n ", + printf("The wdt version = %#x, continuation_code=%#x, identity_code=%#x\n", wdt_identify.version, wdt_identify.continuation_code, wdt_identify.identity_code); @@ -110,7 +110,8 @@ int FWdtIntrExample() FWdtIntrEnable(); /*set the timeout*/ - ret = FWdtSetTimeout(&wdt_ctrl, WDT_INTR_TEST_TIMEOUT); + u32 timeout = (u32)(GenericTimerFrequecy() * WDT_INTR_TEST_TIMEOUT); + ret = FWdtSetTimeout(&wdt_ctrl, timeout); if (FWDT_SUCCESS != ret) { printf("set timeout failed\n"); diff --git a/example/peripherals/wdt/src/wdt_polled_example.c b/example/peripherals/wdt/src/wdt_polled_example.c index 202d411f5..2f3b339fd 100644 --- a/example/peripherals/wdt/src/wdt_polled_example.c +++ b/example/peripherals/wdt/src/wdt_polled_example.c @@ -80,14 +80,15 @@ int FWdtPolledExample() } else { - printf("The wdt version = %#x, continuation_code=%#x, identity_code=%#x\n ", + printf("The wdt version = %#x, continuation_code=%#x, identity_code=%#x\n", wdt_identify.version, wdt_identify.continuation_code, wdt_identify.identity_code); } /*set the timeout*/ - ret = FWdtSetTimeout(&wdt_ctrl, WDT_POLLED_TEST_TIMEOUT); + u32 timeout = (u32)(GenericTimerFrequecy() * WDT_POLLED_TEST_TIMEOUT); + ret = FWdtSetTimeout(&wdt_ctrl, timeout); if (FWDT_SUCCESS != ret) { printf("set timeout failed\n"); @@ -99,7 +100,7 @@ int FWdtPolledExample() for (int i = 0; i < 5; i++) { - fsleep_seconds(2); + fsleep_seconds(WDT_POLLED_TEST_TIMEOUT); FWdtRefresh(&wdt_ctrl); u32 seconds = GenericTimerRead(GENERIC_TIMER_ID0) / GenericTimerFrequecy(); printf("Wdt time seconds: %d\r\n", seconds); diff --git a/example/system/nested_interrupt/src/nested_interrupt_timer_example.c b/example/system/nested_interrupt/src/nested_interrupt_timer_example.c index 039dee9ea..620bbf4b4 100644 --- a/example/system/nested_interrupt/src/nested_interrupt_timer_example.c +++ b/example/system/nested_interrupt/src/nested_interrupt_timer_example.c @@ -78,6 +78,8 @@ static void FGenericPhysicalTimerFunc(void) { GenericTimerStop(GENERIC_TIMER_ID0); InterruptMask(GENERIC_TIMER_NS_IRQ_NUM); + GenericTimerInterruptDisable(GENERIC_TIMER_ID0); + return; } physical_intr_calling = FALSE; } @@ -113,6 +115,8 @@ static void FGenericVirtualTimerHandlerFunc(void) { GenericTimerStop(GENERIC_TIMER_ID1); InterruptMask(GENERIC_VTIMER_IRQ_NUM); + GenericTimerInterruptDisable(GENERIC_TIMER_ID1); + return; } GenericTimerStop(GENERIC_TIMER_ID1); @@ -146,6 +150,9 @@ void FNestedIntrTimerExample(void) GenericTimerStop(GENERIC_TIMER_ID0); GenericTimerStop(GENERIC_TIMER_ID1); + GenericTimerInterruptDisable(GENERIC_TIMER_ID0); + GenericTimerInterruptDisable(GENERIC_TIMER_ID1); + /* setup and enable interrupt */ InterruptSetPriority(GENERIC_TIMER_NS_IRQ_NUM, 0x6); InterruptSetPriority(GENERIC_VTIMER_IRQ_NUM, 0x3); diff --git a/install.py b/install.py index 2fcfea54e..891175452 100755 --- a/install.py +++ b/install.py @@ -35,7 +35,7 @@ import shutil ### environment constant sdk_profile_path = "/etc/profile.d/phytium_dev.sh" -sdk_version = "v1.3.1" +sdk_version = "v1.4.0" ### functions def rm_line(str, file_path): diff --git a/third-party/sfud-1.1.0/ports/fqspi/fqspi_sfud_core.c b/third-party/sfud-1.1.0/ports/fqspi/fqspi_sfud_core.c index d67623d23..4ed3173b4 100644 --- a/third-party/sfud-1.1.0/ports/fqspi/fqspi_sfud_core.c +++ b/third-party/sfud-1.1.0/ports/fqspi/fqspi_sfud_core.c @@ -167,7 +167,13 @@ static sfud_err FQspiFlashTransfer(const sfud_spi *spi, const u8 *write_buf, { addr = ((addr << 8)|(write_buf[i])); } - ret = FQspiFlashWriteData(qspi_p, command, addr, &write_buf[len], write_size - len); + ret = FQspiFlashWriteDataConfig(qspi_p, command); + if (SFUD_SUCCESS != ret) + { + SFUD_ERROR("FQspiFlashWriteDataConfig failed ret = %x", ret); + return ret; + } + ret = FQspiFlashWriteData(qspi_p, addr, &write_buf[len], write_size - len); break; default: break; @@ -247,5 +253,3 @@ sfud_err FQspiProbe(sfud_flash *flash) return result; } - - diff --git a/tools/build/ld/aarch32_ram.ld b/tools/build/ld/aarch32_ram.ld index a3f457a8f..a210e7347 100644 --- a/tools/build/ld/aarch32_ram.ld +++ b/tools/build/ld/aarch32_ram.ld @@ -42,11 +42,16 @@ SECTIONS *(.note.gnu.build-id) } > MEMORY_SPACE /* .text should linked to MEMORY_SPACE */ + .end_text : { . = ALIGN(CONFIG_MMU_PAGE_SIZE); __text_region_end = .; + __rodata_region_start = .; + + } > MEMORY_SPACE + __text_region_size = __text_region_end - __text_region_start ; - __rodata_region_start = .; + .rodata :{ __rodata_start = .; @@ -63,11 +68,14 @@ SECTIONS __rodata1_end = .; } > MEMORY_SPACE - . = ALIGN(CONFIG_MMU_PAGE_SIZE); - __rodata_region_end = .; + .end_rodata : { + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + __rodata_region_end = .; + _image_ram_start = .; + } > MEMORY_SPACE __rodata_region_size = __rodata_region_end - __rodata_region_start ; - _image_ram_start = .; + .interp : { KEEP (*(.interp)) @@ -237,8 +245,12 @@ SECTIONS } > MEMORY_SPACE - . = ALIGN(CONFIG_MMU_PAGE_SIZE); - _image_ram_end = .; + .end_ram : { + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _image_ram_end = .; + } > MEMORY_SPACE + + _image_ram_size = _image_ram_end - _image_ram_start ; #ifdef CONFIG_USE_OPENAMP diff --git a/tools/build/ld/aarch64_ram.ld b/tools/build/ld/aarch64_ram.ld index 0e1bed6fb..c8e9a3e52 100644 --- a/tools/build/ld/aarch64_ram.ld +++ b/tools/build/ld/aarch64_ram.ld @@ -35,11 +35,17 @@ SECTIONS *(.gnu.linkonce.armextab.*) } > MEMORY_SPACE + .end_text : { . = ALIGN(CONFIG_MMU_PAGE_SIZE); __text_region_end = .; + __rodata_region_start = .; + + } > MEMORY_SPACE + + __text_region_size = __text_region_end - __text_region_start ; - __rodata_region_start = .; + .rodata (ALIGN(64)): { __rodata_start = .; *(.rodata) @@ -55,11 +61,15 @@ SECTIONS __rodata1_end = .; } > MEMORY_SPACE - . = ALIGN(CONFIG_MMU_PAGE_SIZE); - __rodata_region_end = .; + .end_rodata : { + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + __rodata_region_end = .; + _image_ram_start = .; + } > MEMORY_SPACE + + __rodata_region_size = __rodata_region_end - __rodata_region_start ; - _image_ram_start = .; .got : { *(.got) @@ -207,11 +217,14 @@ SECTIONS __el1_stack_end = .; . += CONFIG_STACK_SIZE; __el1_stack = .; - + } > MEMORY_SPACE + + .end_ram : { + . = ALIGN(CONFIG_MMU_PAGE_SIZE); + _image_ram_end = .; } > MEMORY_SPACE - . = ALIGN(CONFIG_MMU_PAGE_SIZE); - _image_ram_end = .; + _image_ram_size = _image_ram_end - _image_ram_start ;