diff --git a/arch/armv8/common/fgic_its.c b/arch/armv8/common/fgic_its.c index 5aa2118ab..4d9b782d6 100644 --- a/arch/armv8/common/fgic_its.c +++ b/arch/armv8/common/fgic_its.c @@ -720,13 +720,22 @@ FError FGicItsDeviceIdInit(const FGic *instanse_p, u32 device_id, } } - if((!data->device_table[i].valid_flg) || (i == FGIC_DEVICE_MAX_ID)) + if (i == FGIC_DEVICE_MAX_ID) { if(alloc_addr) { - tlsf_free((tlsf_t)data->mem_poll_p,(void *)alloc_addr) ; + tlsf_free((tlsf_t)data->mem_poll_p,(void *)alloc_addr); + } + tlsf_free((tlsf_t)data->mem_poll_p,(void *)itt); + return FGIC_ITS_DEVICE_TABLE_IS_EXHAUST; + } + else if (!data->device_table[i].valid_flg) + { + if(alloc_addr) + { + tlsf_free((tlsf_t)data->mem_poll_p,(void *)alloc_addr); } - tlsf_free((tlsf_t)data->mem_poll_p,(void *)itt) ; + tlsf_free((tlsf_t)data->mem_poll_p,(void *)itt); return FGIC_ITS_DEVICE_TABLE_IS_EXHAUST; } diff --git a/doc/ChangeLog.md b/doc/ChangeLog.md index ca54ec883..d71e88cd3 100644 --- a/doc/ChangeLog.md +++ b/doc/ChangeLog.md @@ -1,3 +1,28 @@ +# Phytium Standalone SDK 2024-09-10 ChangeLog + +Change Log since 2024-09-09 + +## example + +- repair error about spi sclk_hz on d2000 + +## driver + +- rename freq_hz to sclk_hz +- reset sclk_hz in fspim_g.c + +# Phytium Standalone SDK 2024-09-09 ChangeLog + +Change Log since 2024-09-05 + +## soc + +- remove ftypes.h from fparameters.h + +## arch + +- fix fgic_its.c boundary issue + # Phytium Standalone SDK 2024-09-05 ChangeLog Change Log since 2024-09-05 diff --git a/doc/reference/driver/fspim.md b/doc/reference/driver/fspim.md index 243662630..634631eaf 100644 --- a/doc/reference/driver/fspim.md +++ b/doc/reference/driver/fspim.md @@ -74,7 +74,7 @@ typedef struct u32 irq_num; /* Device interrupt id */ u32 irq_prority; /* Device interrupt priority */ FSpimSlaveDevice slave_dev_id; /* Slave device id */ - u32 freq_hz; /* Clock frequency in Hz */ + u32 sclk_hz; /* Spi transfer clock frequency in Hz */ FSpimTransByte n_bytes; /* Bytes in transfer */ FSpimCpolType cpol; /* Polarity of the clock */ FSpimCphaType cpha; /* Phase of the clock */ diff --git a/drivers/spi/fspim/fspim.c b/drivers/spi/fspim/fspim.c index ce556c429..df31df0a0 100644 --- a/drivers/spi/fspim/fspim.c +++ b/drivers/spi/fspim/fspim.c @@ -191,7 +191,7 @@ FError FSpimReset(FSpim *instance_p) FSpimSetRxDMALevel(base_addr, instance_p->config.rx_dma_level); FSpimSetTxDMALevel(base_addr, instance_p->config.tx_dma_level); - ret = FSpimSetSpeed(base_addr, instance_p->config.freq_hz); + ret = FSpimSetSpeed(base_addr, instance_p->config.sclk_hz); if (FSPIM_SUCCESS != ret) { return ret; @@ -264,12 +264,12 @@ FError FSpimSetOption(FSpim *instance_p, FSpimOption option, u32 value) { return ret; } - instance_p->config.freq_hz = value; + instance_p->config.sclk_hz = value; FSPIM_INFO("Set spim freqency to %d", value); } else { - FSPIM_ERROR("Input error, spim freqency value should be no more than 25M."); + FSPIM_ERROR("Input error, spim freqency value should be no more than %ld.", FSPI_CLK_FREQ_HZ / 2); return FSPIM_ERR_INVAL_PARAM; } } diff --git a/drivers/spi/fspim/fspim.h b/drivers/spi/fspim/fspim.h index 210b7d061..614bfdb44 100644 --- a/drivers/spi/fspim/fspim.h +++ b/drivers/spi/fspim/fspim.h @@ -147,7 +147,7 @@ typedef struct u32 irq_prority; /* Device interrupt priority */ FSpimWorkMode work_mode; /* Device work mode */ FSpimSlaveDevice slave_dev_id; /* Slave device id */ - u32 freq_hz; /* Clock frequency in Hz */ + u32 sclk_hz; /* Spi transfer clock frequency in Hz */ FSpimTransByte n_bytes; /* Bytes in transfer */ FSpimCpolType cpol; /* Polarity of the clock */ FSpimCphaType cpha; /* Phase of the clock */ diff --git a/drivers/spi/fspim/fspim_g.c b/drivers/spi/fspim/fspim_g.c index 9a15c3578..4025d4517 100644 --- a/drivers/spi/fspim/fspim_g.c +++ b/drivers/spi/fspim/fspim_g.c @@ -51,7 +51,7 @@ const FSpimConfig FSPIM_CONFIG_TBL[FSPI_NUM] = .irq_prority = 0, .work_mode = FSPIM_DEV_MASTER_MODE, .slave_dev_id = FSPIM_SLAVE_DEV_0, - .freq_hz = 5000000, + .sclk_hz = FSPI_DEFAULT_SCLK, .n_bytes = 1, .en_test = FALSE, .en_dma = FALSE, @@ -70,7 +70,7 @@ const FSpimConfig FSPIM_CONFIG_TBL[FSPI_NUM] = .irq_prority = 0, .work_mode = FSPIM_DEV_MASTER_MODE, .slave_dev_id = FSPIM_SLAVE_DEV_0, - .freq_hz = 5000000, + .sclk_hz = FSPI_DEFAULT_SCLK, .n_bytes = 1, .en_test = FALSE, .en_dma = FALSE, @@ -89,7 +89,7 @@ const FSpimConfig FSPIM_CONFIG_TBL[FSPI_NUM] = .irq_prority = 0, .work_mode = FSPIM_DEV_MASTER_MODE, .slave_dev_id = FSPIM_SLAVE_DEV_0, - .freq_hz = 5000000, + .sclk_hz = FSPI_DEFAULT_SCLK, .n_bytes = 1, .en_test = FALSE, .en_dma = FALSE, @@ -110,7 +110,7 @@ const FSpimConfig FSPIM_CONFIG_TBL[FSPI_NUM] = .irq_prority = 0, .work_mode = FSPIM_DEV_MASTER_MODE, .slave_dev_id = FSPIM_SLAVE_DEV_0, - .freq_hz = 5000000, + .sclk_hz = FSPI_DEFAULT_SCLK, .n_bytes = 1, .en_test = FALSE, .en_dma = FALSE, diff --git a/drivers/spi/fspim/fspim_hw.c b/drivers/spi/fspim/fspim_hw.c index 11c6ada16..acfd9d33d 100644 --- a/drivers/spi/fspim/fspim_hw.c +++ b/drivers/spi/fspim/fspim_hw.c @@ -125,7 +125,7 @@ FError FSpimSetSpeed(uintptr base_addr, u32 clk_freq) if (clk_freq == 0) { - FSPIM_ERROR("Input spi clock frequency is %d => do not support, this parameter should not be 0."); + FSPIM_ERROR("Input spi clock frequency is %d => do not support, this parameter should not be 0.", clk_freq); return FSPIM_ERR_NOT_SUPPORT; } else @@ -148,7 +148,7 @@ FError FSpimSetSpeed(uintptr base_addr, u32 clk_freq) } else { - FSPIM_ERROR("Input spi clock divider is %d => do not support, this parameter should be set as an even from 2 to 65534.", clk_div); + FSPIM_ERROR("Input spi clock frequency is %ld, this parameter be set wrong. spi clock divider = %d, this parameter should be an even from 2 to 65534.", clk_freq, clk_div); return FSPIM_ERR_NOT_SUPPORT; } } diff --git a/example/peripherals/spi/src/spim_intr_loopback_mode_example.c b/example/peripherals/spi/src/spim_intr_loopback_mode_example.c index 49eb7e512..855e2b6af 100644 --- a/example/peripherals/spi/src/spim_intr_loopback_mode_example.c +++ b/example/peripherals/spi/src/spim_intr_loopback_mode_example.c @@ -145,7 +145,7 @@ static FError FSpimSetupConfig(void) spim_config.cpha = FSPIM_CPHA_2_EDGE; spim_config.cpol = FSPIM_CPOL_LOW; spim_config.n_bytes = FSPIM_1_BYTE; - spim_config.freq_hz = 25000000; + spim_config.sclk_hz = FSPI_DEFAULT_SCLK; spim_config.trans_way = TRANS_WAY_POLL; ret = FSpimCfgInitialize(spim_p, &spim_config); if (FSPIM_SUCCESS != ret) diff --git a/example/peripherals/spi/src/spim_intr_trigger_test.c b/example/peripherals/spi/src/spim_intr_trigger_test.c index 0adfbe5c0..00604978d 100644 --- a/example/peripherals/spi/src/spim_intr_trigger_test.c +++ b/example/peripherals/spi/src/spim_intr_trigger_test.c @@ -242,7 +242,7 @@ static FError FSpimSetupConfig(void) spim_config.cpha = FSPIM_CPHA_2_EDGE; spim_config.cpol = FSPIM_CPOL_HIGH; spim_config.n_bytes = FSPIM_1_BYTE; - spim_config.freq_hz = 5000000; + spim_config.sclk_hz = FSPI_DEFAULT_SCLK; ret = FSpimCfgInitialize(spim_p, &spim_config); if (FSPIM_SUCCESS != ret) { diff --git a/example/peripherals/spi/src/spim_polled_loopback_mode_example.c b/example/peripherals/spi/src/spim_polled_loopback_mode_example.c index e7b3d5520..33885bfec 100644 --- a/example/peripherals/spi/src/spim_polled_loopback_mode_example.c +++ b/example/peripherals/spi/src/spim_polled_loopback_mode_example.c @@ -141,7 +141,7 @@ static FError FSpimSetupConfig(void) spim_config.cpha = FSPIM_CPHA_2_EDGE; spim_config.cpol = FSPIM_CPOL_LOW; spim_config.n_bytes = FSPIM_1_BYTE; - spim_config.freq_hz = 25000000; + spim_config.sclk_hz = FSPI_DEFAULT_SCLK; spim_config.trans_way = TRANS_WAY_POLL; ret = FSpimCfgInitialize(spim_p, &spim_config); if (FSPIM_SUCCESS != ret) diff --git a/example/peripherals/spi/src/spim_pressure_test.c b/example/peripherals/spi/src/spim_pressure_test.c index 90b796bbd..7c3f458b9 100644 --- a/example/peripherals/spi/src/spim_pressure_test.c +++ b/example/peripherals/spi/src/spim_pressure_test.c @@ -32,7 +32,7 @@ #include "sdkconfig.h" #ifndef SDK_CONFIG_H__ - #warning "Please include sdkconfig.h" +#warning "Please include sdkconfig.h" #endif #include "fio_mux.h" @@ -41,7 +41,7 @@ #include "fgeneric_timer.h" #define RX_TX_LENGTH_MAX (1024 * 512) /*512KB*/ -#define SYS_TICKRATE_HZ 100 +#define SYS_TICKRATE_HZ 100 #ifdef CONFIG_ENABLE_FDDMA #include "fparameters_comm.h" @@ -81,12 +81,9 @@ static volatile boolean tx_dma_done = FALSE; #endif +#define EN_TEST TRUE -#define EN_TEST TRUE - - - -#define FSPIM_DELAY_MS 50000 /*timer Delay in milli-seconds */ +#define FSPIM_DELAY_MS 100000 /*timer Delay in milli-seconds */ enum { @@ -115,8 +112,6 @@ static boolean rx_done = FALSE; static u8 tx_buff[RX_TX_LENGTH_MAX] = {0}; static u8 rx_buff[RX_TX_LENGTH_MAX] = {0}; - - #if defined(CONFIG_D2000_TEST_BOARD) || defined(CONFIG_FT2004_DSK_BOARD) #include "fgpio.h" /* D2000/FT2000-4 使用GPIO引脚控制片选信号 */ @@ -179,10 +174,10 @@ static int compare_tx_rx(u32 trans_size) } static void SetupSystick(void) -{ +{ GenericTimerStop(GENERIC_TIMER_ID0); - GenericTimerSetTimerValue(GENERIC_TIMER_ID0, GenericTimerFrequecy() / SYS_TICKRATE_HZ); - GenericTimerStart(GENERIC_TIMER_ID0); + GenericTimerSetTimerValue(GENERIC_TIMER_ID0, GenericTimerFrequecy() / SYS_TICKRATE_HZ); + GenericTimerStart(GENERIC_TIMER_ID0); } static inline u64 FSpimGetTick(void) @@ -197,7 +192,7 @@ static inline u32 FSpimTickCastSeconds(u64 tick) static inline u32 FSpimTickCastMilliSec(u64 tick) { - return (u32)(tick % (u64) GenericTimerFrequecy() / (((u64)GenericTimerFrequecy() * 1 + 999) / 1000)); + return (u32)(tick % (u64)GenericTimerFrequecy() / (((u64)GenericTimerFrequecy() * 1 + 999) / 1000)); } static int FSpimClearConfig(FSpim *spim_p) @@ -217,6 +212,25 @@ static int FSpimClearConfig(FSpim *spim_p) return FSPIM_OPS_OK; } +static int FSpimIntrWaitRxDone(int timeout) +{ + while (TRUE != rx_done) + { + fsleep_microsec(2); + + if (0 >= --timeout) + { + break; + } + } + + if (0 >= timeout) + { + FSPIM_ERROR("Wait for rx timeout"); + return FSPIM_OPS_TRANS_TIMEOUT; + } + return FSPIM_OPS_OK; +} static void FSpimSendRxDoneEvent(void *instance_p, void *param) { @@ -464,7 +478,7 @@ static FError FSpimSetupConfig(FSpimTransWay trans_way) spim_config.cpha = FSPIM_CPHA_2_EDGE; spim_config.cpol = FSPIM_CPOL_LOW; spim_config.n_bytes = FSPIM_1_BYTE; - spim_config.freq_hz = 25000000; + spim_config.sclk_hz = FSPI_DEFAULT_SCLK; spim_config.trans_way = trans_way; ret = FSpimCfgInitialize(spim_p, &spim_config); if (FSPIM_SUCCESS != ret) @@ -493,18 +507,16 @@ static void printProgressBar(int progress, int total) fflush(stdout); } - int FSpimPressureTest(void) { - + FError ret = 0; FSpim *spim_instance = &spim; - u32 trans_size = RX_TX_LENGTH_MAX;; + u32 trans_size = RX_TX_LENGTH_MAX; u32 total_times = 50; int current_times = 0; - int poll_success_flag = 0; int intr_success_flag = 0; int ddma_success_flag = 1; @@ -517,7 +529,7 @@ int FSpimPressureTest(void) /* POLL 模式下的持续压力测试，总共执行total_times次 */ FSpimSetupConfig(TRANS_WAY_POLL); - + SetupSystick(); printf("Spim pressure test start (poll).\r\n"); @@ -533,7 +545,7 @@ int FSpimPressureTest(void) total_ticks_poll += FSpimGetTick() - start_ticks; ret += compare_tx_rx(trans_size); current_times++; - if(current_times % 10 == 0) + if (current_times % 10 == 0) { printProgressBar(current_times, total_times); } @@ -548,13 +560,12 @@ int FSpimPressureTest(void) { poll_success_flag++; printf("Poll mode: spend time: %d.%03ds for transfering %d times. every time transfer %d bytes.\r\n", - FSpimTickCastSeconds(total_ticks_poll), - FSpimTickCastMilliSec(total_ticks_poll), - total_times, - trans_size); + FSpimTickCastSeconds(total_ticks_poll), + FSpimTickCastMilliSec(total_ticks_poll), + total_times, + trans_size); } - /* 中断模式下的持续压力测试，总共执行total_times次 */ current_times = 0; @@ -562,7 +573,6 @@ int FSpimPressureTest(void) FSpimSetupConfig(TRANS_WAY_INTERRUPT); - printf("Spim pressure test start (interrupt).\r\n"); FSpimCsOnOff(TRUE); @@ -570,19 +580,31 @@ int FSpimPressureTest(void) while (current_times < total_times) { FSpimSetupInterrupt(spim_instance); + InitRxTxBuff(trans_size); + start_ticks = FSpimGetTick(); + ret += FSpimTransferByInterrupt(spim_instance, tx_buff, rx_buff, trans_size); - while(FALSE == rx_done); + + if (FSPIM_OPS_OK != FSpimIntrWaitRxDone(FSPIM_DELAY_MS)) + { + FSPIM_DEBUG("Wait for rx timeout !!!"); + ret = FSPIM_OPS_TRANS_TIMEOUT; + goto exit; + } + total_ticks_intr += FSpimGetTick() - start_ticks; + ret += compare_tx_rx(trans_size); + current_times++; - if(current_times % 10 == 0) + if (current_times % 10 == 0) { printProgressBar(current_times, total_times); } - } +exit: if (ret != FT_SUCCESS) { printf("%s@%d: Spim (interrupt mode) pressure test [failure].\r\n", __func__, __LINE__); @@ -590,20 +612,20 @@ int FSpimPressureTest(void) else { intr_success_flag++; - + printf("Interrupt mode: spend time: %d.%03ds for transfering %d times. every time transfer %d bytes.\r\n", - FSpimTickCastSeconds(total_ticks_intr), - FSpimTickCastMilliSec(total_ticks_intr), - total_times, - trans_size); + FSpimTickCastSeconds(total_ticks_intr), + FSpimTickCastMilliSec(total_ticks_intr), + total_times, + trans_size); } FSpimCsOnOff(FALSE); FSpimClearConfig(spim_instance); - #ifdef CONFIG_ENABLE_FDDMA u64 total_ticks_ddma = 0; ddma_success_flag = 0; + u32 timeout = 100000; /* DDMA 模式下的持续压力测试，总共执行total_times次 */ current_times = 0; ret = 0; @@ -623,12 +645,42 @@ int FSpimPressureTest(void) ret += FSpimTransferDMA(spim_instance); FDdmaStart(&ddma_instance); - while (!tx_dma_done || !rx_dma_done); + while (FALSE == tx_dma_done) + { + if (--timeout <= 0) + { + break; + } + + fsleep_millisec(1); + } + + if (0 >= timeout) + { + FSPIM_ERROR("Wait DDMA TX end timeout %d!", timeout); + } + + timeout = 100000; + + while (FALSE == rx_dma_done) + { + if (--timeout <= 0) + { + break; + } + fsleep_millisec(1); + } + + if (0 >= timeout) + { + FSPIM_ERROR("Wait DDMA RX end timeout %d!", timeout); + } + total_ticks_ddma += FSpimGetTick() - start_ticks; ret += compare_dma_tx_rx(trans_size); current_times++; - if(current_times % 10 == 0) + if (current_times % 10 == 0) { printProgressBar(current_times, total_times); } @@ -647,15 +699,13 @@ int FSpimPressureTest(void) { ddma_success_flag++; printf("Ddma mode: spend time: %d.%03ds for transfering %d times. every time transfer %d bytes.\r\n", - FSpimTickCastSeconds(total_ticks_ddma), - FSpimTickCastMilliSec(total_ticks_ddma), - total_times, - trans_size); + FSpimTickCastSeconds(total_ticks_ddma), + FSpimTickCastMilliSec(total_ticks_ddma), + total_times, + trans_size); } #endif - - if (poll_success_flag && intr_success_flag && ddma_success_flag) { printf("%s@%d: Spim pressure test [success].\r\n", __func__, __LINE__); @@ -665,5 +715,4 @@ int FSpimPressureTest(void) printf("%s@%d: Spim pressure test [failure].\r\n", __func__, __LINE__); } return FT_SUCCESS; - } \ No newline at end of file diff --git a/soc/d2000/fcpu_affinity_mask.c b/soc/d2000/fcpu_affinity_mask.c index aed7cb26b..27415bb05 100644 --- a/soc/d2000/fcpu_affinity_mask.c +++ b/soc/d2000/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" /** * @name: GetCpuMaskToAffval diff --git a/soc/d2000/fparameters.h b/soc/d2000/fparameters.h index d053579c0..126383533 100644 --- a/soc/d2000/fparameters.h +++ b/soc/d2000/fparameters.h @@ -29,10 +29,6 @@ extern "C" { #endif -#if !defined(__ASSEMBLER__) -#include "ftypes.h" -#endif - #define SOC_TARGET_D2000 #define CORE0_AFF 0x0 @@ -269,7 +265,8 @@ extern "C" #define FSPI1_BASE_ADDR 0x28013000 #define FSPI0_ID 0 #define FSPI1_ID 1 -#define FSPI_CLK_FREQ_HZ 48000000 +#define FSPI_CLK_FREQ_HZ 48000000U +#define FSPI_DEFAULT_SCLK 4800000U #define FSPI_NUM 2 #define FSPI0_IRQ_NUM 50 #define FSPI1_IRQ_NUM 51 diff --git a/soc/e2000/d/fcpu_affinity_mask.c b/soc/e2000/d/fcpu_affinity_mask.c index 6f1a31eb5..9029351df 100644 --- a/soc/e2000/d/fcpu_affinity_mask.c +++ b/soc/e2000/d/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list) { diff --git a/soc/e2000/fparameters_comm.h b/soc/e2000/fparameters_comm.h index b1ccf5366..dcc01b0ca 100644 --- a/soc/e2000/fparameters_comm.h +++ b/soc/e2000/fparameters_comm.h @@ -30,9 +30,6 @@ extern "C" #endif /***************************** Include Files *********************************/ -#if !defined(__ASSEMBLER__) -#include "ftypes.h" -#endif #define SOC_TARGET_E2000 /************************** Constant Definitions *****************************/ @@ -279,7 +276,8 @@ extern "C" #define FSPI2_IRQ_NUM 193U #define FSPI3_IRQ_NUM 194U -#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_DEFAULT_SCLK 5000000U #define FSPI_NUM 4U #define FSPI_DMA_CAPACITY BIT(0) diff --git a/soc/e2000/q/fcpu_affinity_mask.c b/soc/e2000/q/fcpu_affinity_mask.c index be4e8f50a..fb58087dc 100644 --- a/soc/e2000/q/fcpu_affinity_mask.c +++ b/soc/e2000/q/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list) { diff --git a/soc/e2000/s/fcpu_affinity_mask.c b/soc/e2000/s/fcpu_affinity_mask.c index 4f8927b74..d6c51890e 100644 --- a/soc/e2000/s/fcpu_affinity_mask.c +++ b/soc/e2000/s/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list) { diff --git a/soc/ft2004/fcpu_affinity_mask.c b/soc/ft2004/fcpu_affinity_mask.c index a4405b153..6074c54be 100644 --- a/soc/ft2004/fcpu_affinity_mask.c +++ b/soc/ft2004/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list) { diff --git a/soc/ft2004/fparameters.h b/soc/ft2004/fparameters.h index f89c9cc2c..caecd4c14 100644 --- a/soc/ft2004/fparameters.h +++ b/soc/ft2004/fparameters.h @@ -29,10 +29,6 @@ extern "C" { #endif -#if !defined(__ASSEMBLER__) -#include "ftypes.h" -#endif - #define SOC_TARGET_FT2004 #define CORE0_AFF 0x0 @@ -186,7 +182,8 @@ extern "C" #define FSPI1_BASE_ADDR 0x28013000 #define FSPI0_ID 0 #define FSPI1_ID 1 -#define FSPI_CLK_FREQ_HZ 48000000 +#define FSPI_CLK_FREQ_HZ 48000000U +#define FSPI_DEFAULT_SCLK 4800000U #define FSPI_NUM 2 #define FSPI0_IRQ_NUM 50 #define FSPI1_IRQ_NUM 51 diff --git a/soc/pd2308/fcpu_affinity_mask.c b/soc/pd2308/fcpu_affinity_mask.c index 792c87fcc..f4b0ba62b 100644 --- a/soc/pd2308/fcpu_affinity_mask.c +++ b/soc/pd2308/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" const int cluster_ids[FCORE_NUM] = { CORE0_AFF, diff --git a/soc/pd2308/fparameters.h b/soc/pd2308/fparameters.h index 000f43ce0..c522e88f7 100644 --- a/soc/pd2308/fparameters.h +++ b/soc/pd2308/fparameters.h @@ -29,10 +29,6 @@ extern "C" { #endif -#if !defined(__ASSEMBLER__) -#include "ftypes.h" -#endif - #define SOC_TARGET_PD2308 #define CORE0_AFF 0x000 @@ -265,7 +261,8 @@ enum #define FSPI0_IRQ_NUM 110U #define FSPI1_IRQ_NUM 111U -#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_DEFAULT_SCLK 5000000U #define PLAT_AHCI_HOST_MAX_COUNT 5 #define AHCI_BASE_0 0 diff --git a/soc/phytiumpi/fcpu_affinity_mask.c b/soc/phytiumpi/fcpu_affinity_mask.c index be4e8f50a..fb58087dc 100644 --- a/soc/phytiumpi/fcpu_affinity_mask.c +++ b/soc/phytiumpi/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list) { diff --git a/soc/phytiumpi/fparameters_comm.h b/soc/phytiumpi/fparameters_comm.h index 56592ed0c..a29af3584 100644 --- a/soc/phytiumpi/fparameters_comm.h +++ b/soc/phytiumpi/fparameters_comm.h @@ -30,9 +30,6 @@ extern "C" #endif /***************************** Include Files *********************************/ -#if !defined(__ASSEMBLER__) -#include "ftypes.h" -#endif /************************** Constant Definitions *****************************/ /* CACHE */ @@ -250,7 +247,8 @@ extern "C" #define FSPI2_IRQ_NUM 193U #define FSPI3_IRQ_NUM 194U -#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_CLK_FREQ_HZ 50000000U +#define FSPI_DEFAULT_SCLK 5000000U #define FSPI_NUM 4U #define FSPI_DMA_CAPACITY BIT(0) diff --git a/soc/qemu_virt_64/fcpu_affinity_mask.c b/soc/qemu_virt_64/fcpu_affinity_mask.c index ae1013539..6716ff9f2 100644 --- a/soc/qemu_virt_64/fcpu_affinity_mask.c +++ b/soc/qemu_virt_64/fcpu_affinity_mask.c @@ -22,6 +22,7 @@ * 1.0 zhangyan 2023/11/6 init commit */ #include "fparameters.h" +#include "ftypes.h" /** * @name: GetCpuMaskToAffval diff --git a/third-party/sfud-1.1.0/ports/fspim/fspim_sfud_core.c b/third-party/sfud-1.1.0/ports/fspim/fspim_sfud_core.c index d02d6e8f5..1cc5111bb 100644 --- a/third-party/sfud-1.1.0/ports/fspim/fspim_sfud_core.c +++ b/third-party/sfud-1.1.0/ports/fspim/fspim_sfud_core.c @@ -608,7 +608,7 @@ sfud_err FSpimProbe(sfud_flash *flash) input_cfg.cpha = FSPIM_CPHA_1_EDGE; input_cfg.cpol = FSPIM_CPOL_LOW; input_cfg.n_bytes = FSPIM_1_BYTE; /* sfud only support 1 bytes read/write */ - input_cfg.freq_hz = 12500000; + input_cfg.sclk_hz = FSPI_DEFAULT_SCLK; #ifdef CONFIG_SFUD_TRANS_MODE_DDMA