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/*
* Copyright : (C) 2022 Phytium Information Technology, Inc.
* All Rights Reserved.
*
* This program is OPEN SOURCE software: you can redistribute it and/or modify it
* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
* either version 1.0 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the Phytium Public License for more details.
*
*
* FilePath: fi3c_hw.c
* Date: 2023-9-11 14:53:42
* LastEditTime: 2023-9-11 08:36:22
* Description:  This file is for I3C register read/write operation
*
* Modify History:
* Ver   Who        Date         Changes
* ----- ------     --------    --------------------------------------
* 1.0 zhangyan 2023/9/11 first commit
*/
#include <string.h>
#include "fsleep.h"
#include "fdebug.h"
#include "ferror_code.h"
#include "fassert.h"
#include "fi3c_hw.h"
#include "fi3c.h"
#define FI3C_DEBUG_TAG "I3C_HW"
#define FI3C_ERROR(format, ...) FT_DEBUG_PRINT_E(FI3C_DEBUG_TAG, format, ##__VA_ARGS__)
#define FI3C_INFO(format, ...) FT_DEBUG_PRINT_I(FI3C_DEBUG_TAG, format, ##__VA_ARGS__)
#define FI3C_DEBUG(format, ...) FT_DEBUG_PRINT_D(FI3C_DEBUG_TAG, format, ##__VA_ARGS__)
/************************** Function Prototypes ******************************/
/**
* @name: FI3cSetEnable
* @msg: 设置I3C控制器的使能状态
* @return {*}
* @param {uintptr} addr, I3c控制器基地址
* @param {boolean} enable, TRUE: 使能,FALSE: 去使能
*/
FError FI3cSetEnable(uintptr addr, boolean enable)
{
if (enable == TRUE)
{
FI3C_SETBIT(addr, FI3C_CTRL_OFFSET, FI3C_CTRL_DEV_EN);
}
else
{
FI3C_CLEARBIT(addr, FI3C_CTRL_OFFSET, FI3C_CTRL_DEV_EN);
}
return FI3C_SUCCESS;
}