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63 lines
2.3 KiB
63 lines
2.3 KiB
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fmmu_table.c
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* Date: 2023-11-6 10:33:28
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* LastEditTime: 2023-11-6 10:33:28
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* Description: This file is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 zhangyan 2023/11/6 init commit
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* 1.1 huanghe 2024/05/21 Unified aarch32 and aarch64 mmu tables
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*/
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#include "fmmu.h"
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#include "ftypes.h"
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#include "fparameters.h"
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const struct ArmMmuRegion mmu_regions[] =
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{
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MMU_REGION_FLAT_ENTRY("DEVICE_REGION",
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0x7000000, (512 * 1024 * 1024),
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MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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MMU_REGION_FLAT_ENTRY("VIRT_GIC_DIST",
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0x08000000, (0x000A0000 ),
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MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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MMU_REGION_FLAT_ENTRY("VIRT_GIC_REDIST",
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0x080A0000, (0x00F60000 ),
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MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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// MMU_REGION_FLAT_ENTRY("PCIE_CONFIG_REGION",
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// 0x40000000, 0x10000000,
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// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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// MMU_REGION_FLAT_ENTRY("PCIE_CONFIG_REGION",
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// 0x50000000, 0x30000000,
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// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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// #ifdef __aarch64__
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// MMU_REGION_FLAT_ENTRY("PCIE_MEM64_REGION",
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// 0x1000000000, 0x1000000000,
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// MT_DEVICE_NGNRNE | MT_P_RW_U_NA | MT_NS),
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// #endif
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};
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const struct ArmMmuConfig mmu_config =
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{
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.num_regions = ARRAY_SIZE(mmu_regions),
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.mmu_regions = mmu_regions,
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};
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